User's Manual

RX and TX power line filters
Transistor Q308 is configured as a 5v power supply ripple filter. The filter reduces the noise
on the carrier and local oscillator signals.
RX
VCO
The RX VCO comprises JFET Q301, coil L301 , and varactor D301 and is configured as a
Colpitts Oscillator . D301 produces a change in frequency with a change in DC voltage and
is controlled by The tuning voltage signal present at the cathode. The local oscillator signal
at the source of Q301 is Applied to the cascode buffer/amplifier formed by Q16 and Q17.The
Local signal is applied to the Mixer when diode D2 is reverse biased and D3 is forward
biased.
TX VCO
The TX VCO comprises JFET Q301,coil L303 , and varactor D302 and D303 and is
configured as A Colpitts oscillator . D302 produces a change in frequency with a change in
DC voltage and is controlled by the tuning voltage signal present at the cathode. The AF
signal at J501 pin 1 is applied to the cathode of D303 to produce FM modulation. When
diode D2 is forward biased and D3 is reversed biased the modulated RF signal at the
collector of Q16 is passed to the power Amplifier and harmonic filter via the cascade
buffer/amplifier (Q21 and Q22).
PLL IC
The reference frequency from the TCXO, at 12.8 MHZ, is connected to pin 1 of IC1 (MB1504)
The appropriate VCO is connected to pin 11.
REFDIV divides the 12.8 MHz to produce a reference frequency (Fr) of 5 or 6. 25 kHz
dependent upon channel spacing selected. VARDIV divides the prescaled VCO frequency to
produce a variable frequency (Fv). Fv and Fr are fed to the phase detector.
Phase detector
When Fv=Fr, the phase detector output (pins 15 and 16,IC1) produces narrow negative
pulses And Fv and Fr pulse widths are identical. When FvFr pin 15 (V) pulses negative with
pin 16 (R) remaining high. When FvFr pin 16 (R) pulses negative with pin 15(V) remaining
high. The signal at pin 15 and 16 is smoothed the loop filter and applied to the VCO.
Out-of-lock detector
T he out-of-lock detector produces a series of logic level pulses when the
loop is out of lock at pin 7 of IC1.The pulses at pin 7 of IC1 are buffered by
Q6 and then integrated by R17 and C19. The product of the integrating
circuit is fed to IC501 pin 25.
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