User manual

5 GR-LEON4-ITX Development Board
User Manual
Figure 2-13: SPI Interface Configuration........................................................................................19
Figure 2-14: PIO interface configuration........................................................................................19
Figure 2-15: Debug Support Unit connections................................................................................20
Figure 2-16: Board level Clock Distribution Scheme......................................................................22
Figure 2-17: Clock and PLL organisation inside LEON4 ASIC.......................................................23
Figure 2-18: Power Regulation Configuration.................................................................................24
Figure 2-19: Watchdog configuration.............................................................................................25
Figure 4-1: Front Panel View (pin 1 of connectors marked)...........................................................28
Figure 4-2: Board Connector View ................................................................................................29
Figure 4-3: PCB Top View..............................................................................................................40
Figure 4-4: GR-LEON4-ITX Assembly Photo (Top View)...............................................................41
REVISION HISTORY
Revision Date Page Description
0.1 DRAFT 2010-03-01 All New document
0.2 2010-03-17 Added reference to Quick Start Guide
0.3 2010-08-13 Added picture showing how to connect ribbon cable with DE-9 connector.
© Aeroflex Gaisler AB August 2010, Rev. 0.3