User manual

PCL-818 Series User Manual 54
When you write data to the D/A channels, write the low byte first. The
low byte is temporarily held by a register in the D/A and not released to
the output. After you write the high byte, the low byte and high byte are
added and passed to the D/A converter. This double buffering process
protects the D/A data integrity through a single step update.
The PCL-818HD/HD/L provides a precision fixed internal -5 V or -10 V
reference, selectable by means of Jumper JP10. This reference voltage is
available at connector CN3 pin 11. If you use this voltage as the D/A ref-
erence input, the D/A output range is either 0 to +5 V or 0 to +10 V. You
can also use an external DC or AC source as the D/A reference input. In
this case, the maximum reference input voltage is ±10 V, and the maxi-
mum D/A output ranges are 0 to +10 V or 0 to -10 V.
Connector CN3 supports all D/A signal connections. Chapter 3 gives con-
nector pin assignments. Chapter 3 gives a wiring diagram for D/A signal
connections.
C.10 FIFO Interrupt Control — BASE+06H
Table C-10 Register for FIFO Interrupt Control
FINT Enable/disable FIFO interrupt
0 FIFO interrupt disabled
FIFO interrupt enabled
Write FIFO interrupt control
Bit # 7 6543 2 1 0
BASE + 06H X X X X X X X FINT
Note: This register is not used for PCL-818L.