User manual

PCL-818 Series User Manual 38
Appendix A Specifications
A.1 Analog Input
Channels 16 single-ended or 8 differential or combination
Resolution 12-bit
FIFO Size 4K samples (for PCL-818HD/HG only)
PCL-818HD Max. Sam-
pling Rate
1
100 KS/s
PCL-818HG Max. Sam-
pling Rate
Gain 0.5, 1 5, 10 50, 100 500, 1000
Speed 100 KS/s 35 KS/s 7 KS/s 770 S/s
PCL-818L Max. Sam-
pling Rate
1
40 KS/s
Conversion Time 8 µs
Input range and
Gain List for PCL-
818HD
Gain 0.5 1 2 4 8
Unipolar N/A 0~10 0~5 0~2.5 0~1.25
Bipolar ±10 ±5 ±2.5 ±1.25 ±0.625
Input range and
Gain List for PCL-
818HG
Gain 0.5 1 5 10 50 100 500 1000
Unipolar N/A 0~1
0
N/A 0~1 N/A 0~0.
1
N/A 0~0.
01
Bipolar ±10 ±5 ±1 ±0.5 ±0.1 ±0.0
5
±0.01 ±0.00
5
Input range and
Gain List for PCL-818L
Gain 0.5 1 2 4 8
Bipolar ±10 ±5 ±2.5 ±1.25 ±0.625
Drift Gain 1 2 4 8 16
Zero (V/) 15 15 15 15 15
Gain (ppm//) 25 25 25 30 40
Small Signal Bandwidth
for PGA
Gain 1 2 4 8 16
Bandwidth 4.0 2.0 MHz 1.5 MHz 0.65 0.35 MHz
Common mode voltage ±11 V max. (operational)
Max. Input voltage ±15 V
Input Protect 30 Vp-p
Input Impedance 1 G/5 pF
Trigger Mode Software, onboard Programmable Pacer or External
PCL-818HD/L
Accuracy
DC INLE: ±1 LSB
Monotonicity: 12 bits
Offset error: Adjustable to zero
Gain 0.5 1 2 4 8
Gain error
(% FSR)
0.01 0.01 0.02 0.02 0.04
Ch Type S.E./D S.E./D S.E./D D D
AC SNR: 68 dB
ENOB: 11 bits
PCL-818HG
Accuracy
DC INLE: ±1 LSB
Monotonicity: 12 bits
Offset error: Adjustable to zero
Gain 0.5,1 5,10 50,100 500 1000
Gain error
(% FSR)
0.01 0.02 0.04 0.08 0.08
Ch Type S.E./D S.E./D D D D
AC SNR: 68 dB
ENOB: 11 bits
External TTL Trigger
Input
Low 0.4 V max.
High 2.4 V min.