User manual

C.9 Interrupt Control Register — BASE+8H/CH/10H
The PCI-1730 Interrupt Control Register controls the status of four interrupt
signal sources (IDI0, IDI1, DI0, DI1). The user can clear the interrupt by
writing its corresponding value to the Interrupt Control Register, as shown in
below table.
Table C-10 Register for interrupt control
Write Interrupt Control Register
Bit # 7 6 5 4 3 2 1 0
BASE + 8H DI1EN DI0EN IDI1EN IDI0EN
BASE + CH DI1RF DI0RF IDI1RF IDI0RF
BASE + 10H DI1CLR DI0CLR IDI1CLR IDI0CLR
IDI/DInCLR Interrupt clear control bits (n = 0 ~ 1)
This bit must first be cleared to service the next interrupt.
0 Don’t care
1 Clear the interrupt
IDI/DInEN Interrupt enable control bits (n = 0 ~ 1)
Read this bit to Enable/Disable the interrupt.
0 Disable
1 Enable
IDI/DInRF Interrupt triggering control bits (n = 0 ~ 1)
The interrupt can be triggered by a rising edge or falling
edge of the interrupt signal, as determined by the value in
this bit.
0 Rising edge trigger
1 Falling edge trigger
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