User`s manual

Chapter 3 Function Description 21

3.3 Interrupt Functions

3.3.1 Introduction

Two lines of each I/O port C, plus ports A0 and B0, are connected to

the interrupt circuitry. The “Interrupt Control Register” of the PCI-

1753/1753E controls how the combination of these signals generates

an interrupt. Six interrupt request signals can be generated at the

same time, and then the software can service these six request signals

by IRQ. The multiple interrupt sources provide the card with more

capability and flexibility.

3.3.2 IRQ Level

The IRQ level is set automatically by the PCI plug-and-play BIOS

and is saved in the PCI controller. There is no need for users to set the

IRQ level. Only one IRQ level is used by this card, although it has six

interrupt sources.

3.3.3 Interrupt Control Registers

The “Interrupt Control Registers” (Base + 16, 17, 18 and 19 for the

PCI-1753, and Base + 48, 49, 50 and 51 for the PCI-1753E) control

the interrupt signal sources, edges and flags. The following table

shows the bit map of each interrupt control register. These registers

are readable/writable. When writing to one of them, it is used as a

control register, and when reading from it, it is used as a status