Specifications

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have an interrupt status register; see notes on ’INTERRUPT SOURCES’

below.

INTERRUPT SOURCES

PC218E PC212E PC215E/PCI215

------------- ------------- -------------

Sources 6 6 6

0 CTR-X1-OUT PPI-X-C0 PPI-X-C0

1 CTR-X2-OUT PPI-X-C3 PPI-X-C3

2 CTR-Y1-OUT CTR-Y1-OUT PPI-Y-C0

3 CTR-Y2-OUT CTR-Y2-OUT PPI-Y-C3

4 CTR-Z1-OUT CTR-Z1-OUT CTR-Z1-OUT

5 CTR-Z2-OUT CTR-Z2-OUT CTR-Z2-OUT

PC214E PC272E/PCI272

------------- -------------

Sources 1 6

0 JUMPER-J5 PPI-X-C0

1 PPI-X-C3

2 PPI-Y-C0

3 PPI-Y-C3

4 PPI-Z-C0

5 PPI-Z-C3

When an interrupt source is enabled in the interrupt source enable

bit to 1 in the interrupt status register.

When the interrupt status register value as a whole (actually, just the

6 least significant bits) goes from zero to non-zero, the board will

generate an interrupt. For level-triggered hardware interrupts (PCI

card), the interrupt will remain asserted until the interrupt status

(ISA card), no further interrupts will occur until the interrupt status

status register, the corresponding interrupt source must be disabled

in the interrupt source enable register (there is no separate interrupt

clear register).

The PC214E does not have an interrupt source enable register or an

interrupt status register; its ’INTERRUPT’ subdevice has a single

channel and its interrupt source is selected by the position of jumper

J5.

COMMANDS

The driver supports a read streaming acquisition command on the

’INTERRUPT’ subdevice. The channel list selects the interrupt sources

to be enabled. All channels will be sampled together (convert_src ==

TRIG_NOW). The scan begins a short time after the hardware interrupt

occurs, subject to interrupt latencies (scan_begin_src == TRIG_EXT,

scan_begin_arg == 0). The value read from the interrupt status register

is packed into a sampl_t value, one bit per requested channel, in the

order they appear in the channel list.