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copyrighted 2001 by Advantech Co., Ltd. All rights are reserved.

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Acknowledgments

PC-LabCard is a trademark of Advantech Co., Ltd. IBM and PC are

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Microsoft Corporation. Intel and Pentium are trademarks of Intel

Corporation. Delphi and C++ Builder are trademarks of Inprise Corpora-

tion.

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The PCI-1710/1710L/1710HG/1710HGL/1711/1711L/1716/1716L,

developed by ADVANTECH CO., LTD., has passed the CE test for

environmental specifications when shielded cables are used for

external wiring. We recommend the use of shielded cables. This kind of

cable is available from Advantech. Please contact your local supplier

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Part No. 2003171600 1st Edition

Printed in Taiwan June 2001

Summary of content (118 pages)

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Copyright This documentation and the software included with this product are copyrighted 2001 by Advantech Co., Ltd. All rights are reserved. Advantech Co., Ltd. reserves the right to make improvements in the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated or transmitted in any form or by any means without the prior written permission of Advantech Co., Ltd. Information provided in this manual is intended to be accurate and reliable.
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Contents 1. Introduction....................................................... 1 1.1 1.2 1.3 1.4 Features ............................................................................ 2 Installation Guide ............................................................. 4 Software ............................................................................ 6 Accessories ....................................................................... 6 2. Installation ...................................................
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5. Calibration ...................................................... 37 5.1 5.2 5.3 PCI-1710/1710L/1710HG/1710HGL Calibration ......... 38 PCI-1711/1711L Calibration .......................................... 41 PCI-1716/1716L Calibration .......................................... 43 Appendix A. Specifications ................................ 55 Appendix B. Block Diagram ............................... 65 C. Register Structure and Format ..................... 69 C.1 Overview .............................
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C.18 Programmable Timer/Counter Registers BASE+24, BASE+26, BASE+28 and BASE+30 ............................. 92 Appendix D. 82C54 Counter Function ............... 93 D.1 D.2 D.3 D.4 The Intel 82C54 .............................................................. 93 Counter Read/Write and Control Registers ................. 94 Counter Operating Modes ............................................. 96 Counter Operations ........................................................ 98 Appendix E.
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Figures Figure 1-1: Figure 2-1: Figure 2-2: Figure 2-3: Figure 2-4: Figure 2-5: Figure 2-6: Figure 2-7: Figure 2-8: Figure 2-9: Figure 2-10: Figure 2-11: Figure 2-13: Figure 2-12: Figure 2-14: Figure 3-1: Figure 3-2: Figure 3-3: Figure 3-4: Figure 3-5: Figure 5-1: Figure 5-2: Figure 5-3: Figure 5-4: Figure 5-5: Figure 5-6: Figure 5-7: Figure 5-8: Installation Flow Chart ............................................................ 5 The Setup Screen of Advantech Automation Software ..........
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Figure 5-9: A/D Calibration Procedure 3 ................................................. 47 Figure 5-11: Range Selection in D/A Calibration ....................................... 48 Figure 5-10: A/D Calibration is finished .................................................... 48 Figure 5-12: Calibrating D/A Channel 0 .................................................... 49 Figure 5-13: Calibrating D/A Channel 1 ....................................................
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Tables Table 3-1: I/O Connector Signal Description ......................................... 25 Table C-1: PCI-1710/1710L/1710HG/1710HGL/1711/1711L/1716/ 1716L register format (Part 3) .............................................. 72 PCI-1710/1710L/1710HG/1710HGL/1711/1711L register format (Part 4) ........................................................................ 73 PCI-1716/1716L register format (Part 5) .............................
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Table C-21: Calibration Command and Data Register .............................. 91 Table C-22: Register for Board ID ............................................................ 92 Table E-1: Table E-2: A/D binary code table ............................................................ 102 D/A binary code table ............................................................
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1 Chapter 1 Chapter 1. Introduction Thank you for buying the Advantech PCI-1710/1710L/1710HG/ 1710HGL/1711/1711L/1716/1716L PCI card. The Advantech PCI-1710/ 1710L/1710HG/1710HGL/1711/1711L/1716/1716L is a powerful data acquisition (DAS) card for the PCI bus. It features a unique circuit design and complete functions for data acquisition and control, including A/D conversion, D/A conversion, digital input, digital output, and counter/timer.
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Chapter 1 1.
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Chapter 1 virtually no need to set any jumpers or DIP switches. Flexible Input Types and Range Settings The PCI-1710/1710L/1710HG/1710HGL/1711/1711L/1716/1716L features an automatic channel/gain scanning circuit. This circuit design controls multiplexer switching during sampling. Users can set different gain values for each channel according to their needs for the corresponding range of input voltage. The gain value settings thus selected is stored in the SRAM.
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Chapter 1 channels or pulse generation. The other two are cascaded into a 32-bit timer for pacer triggering. Note: ✎ Pace trigger determines how fast A/D conversion will be done in pacer trigger mode. ✎ For detailed specifications of the PCI-1710/1710L/1710HG/1710HGL/ 1711/1711L/1716/1716L, please refer to Appendix A, Specifications. 1.
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Chapter 1 Figure 1-1: Installation Flow Chart Advantech Co., Ltd. www.advantech.
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Chapter 1 1.3 Software Advantech offers a rich set of DLL drivers, third-party driver support and application software to help fully exploit the functions of your PCI1710/1710L/1710HG/1710HGL/1711/1711L/1716/1716L card: • DLL driver (on the companion CD-ROM) • LabVIEW driver • Advantech ActiveDAQ • Advantech GeniDAQ For more information on software, please refer to Chapter 4, Software Overview.
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Chapter 1 can be readily connected to the Advantech PC-Lab cards and allow easy yet reliable access to individual pin connections for the PCI-1710/1710L/1710HG/ 1710HGL/1711/1711L/1716/1716L card. ❏ PCLD-8710 The PCLD-8710 is a DIN-rail mounting screw-terminal board to be used with any of the PC-LabCards which have 68-pin SCSI connectors.
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Chapter 1 This page is left blank on purpose. PCI-1710 series User’s Manual –8– Advantech Co., Ltd. www.advantech.
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2 Chapter 2 Chapter 2. Installation This chapter gives users a package item checklist, proper instructions about unpacking and step-by-step procedures for both driver and card installation. Be noted that using PCI-1716/1716L for example. 2.1 Unpacking After receiving your PCI-1710/1710L/1710HG/1710HGL/1711/1711L/ 1716/1716L package, please inspect its contents first.
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Chapter 2 Also pay extra caution to the following aspects to ensure proper installation: Avoid physical contact with materials that could hold static electricity such as plastic, vinyl and Styrofoam. Whenever you handle the card, grasp it only by its edges. DO NOT TOUCH the exposed metal pins of the connector or the electronic components. Note: ✎ Keep the antistatic bag for future use. You might need the original bag to store the card if you have to remove the card from PC or transport it elsewhere.
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Chapter 2 2.2 Driver Installation We recommend you to install the driver before you install the PCI1710/1710L/1710HG/1710HGL/1711/1711L/1716/1716L card into your system, since this will guarantee a smooth installation process. The 32-bit DLL driver Setup program for the PCI-1710/1710L/1710HG/ 1710HGL/1711/1711L/1716/1716L card is included on the companion CD-ROM that is shipped with your DAS card package.
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Chapter 2 Figure 2-2: Different options for Driver Setup For further information on driver-related issues, an online version of DLL Drivers Manual is available by accessing the following path: Start/Programs/Advantech Driver for 95 and 98 (or for NT/2000)/ Driver Manual PCI-1710 series User’s Manual – 12 – Advantech Co., Ltd. www.advantech.
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Chapter 2 2.3 Hardware Installation Note: ✎ Make sure you have installed the driver first before you install the card (please refer to 2.2 Driver Installation) After the DLL driver installation is completed, you can now go on to install the PCI-1710/1710L/1710HG/1710HGL/1711/1711L/1716/1716L card in any PCI slot on your computer. But it is suggested that you should refer to the computer user manual or related documentations if you have any doubt.
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Chapter 2 After the PCI-1710/1710L/1710HG/1710HGL/1711/1711L/1716/1716L card is installed, you can verify whether it is properly installed on your system in the Device Manager: 1. Access the Device Manager through Control Panel/System/Device Manager. 2. The device name of the PCI-1710/1710L/1710HG/1710HGL/1711/ 1711L/1716/1716L should be listed on the Device Manager tab on the System Property Page.
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Chapter 2 2.4 Device Setup & Configuration The Device Installation program is a utility that allows you to set up, configure and test your device, and later stores your settings on the system registry. These settings will be used when you call the APIs of Advantech 32-bit DLL drivers. Setting Up the Device Step 1: To install the I/O device for your card, you must first run the Device Installation program (by accessing Start/Programs/ Advantech Driver for 95 and 98 (or for NT/2000)/Device Installation).
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Chapter 2 Figure 2-5: The I/O Device Installation dialog box Step 3: Scroll down the List of Devices box to find the device that you wish to install, then click the Add... button to evoke the Device(s) found dialog box such as one shown in Figure 2-6. The Device(s) found dialog box lists all the installed devices of selected option on your system. Select the device you want to configure from the list box and press the OK button.
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Chapter 2 Figure 2-6: The “Device(s) Found” dialog box Configuring the Device Step 4: On the Device Setting dialog box (Figure 2-7), you can configure the voltage source either as External or Internal, and specify the voltage output range for the 2 D/A channels. Figure 2-7: The Device Setting dialog box Note: ✎ Users can configure the source of D/A reference voltage either as Internal or External, and select the output voltage range.
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Chapter 2 Step 5: After you have finished configuring the device, click OK and the device name will appear in the Installed Devices box as seen below: Figure 2-8: The Device Name appearing on the list of devices box Note: ✎ As we have noted, the device name “000:PCI-1716 I/O=E000H” begins with a device number “000”, which is specifically assigned to each card. The device number is passed to the driver to specify which device you wish to control.
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Chapter 2 2.5 Device Testing Following through the Setup and Configuration procedures to the last step described in the previous section, you can now proceed to test the device by clicking the Test Button on the I/O Device Installation dialog box (Figure 2-8).
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Chapter 2 Testing Analog Input Function Click the Analog Input tab to bring it up to the front of the screen. Select the input range for each channel in the Input range drop-down boxes. Configure the sampling rate on the scroll bar. Switch the channels by using the up/down arrow. Figure 2-10: Analog Input tab on the Device Test dialog box Testing Analog Output Function (only for PCI-1710/1710HG/ 1711/1716) Click the Analog Output tab to bring it up to the foreground.
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Chapter 2 Testing Digital Input Function Click the Digital Input tab to show forth the Digital Input test panel as seen below. Through the color of the lamps, users can easily discern whether the status of each digital input channel is either high or low. Figure 2-12: Digital Input tab on the Device Test dialog box Testing Digital Output Function Click the Digital Output tab to bring up the Digital Output test panel such as the one seen on the next page.
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Chapter 2 Testing Counter Function Click the Counter Tab to bring its test panel forth. The counter channel (Channel 0) offers the users two options: Event counting and Pulse out. If you select Event counting, you need first to connect your clock source to pin CNT0_CLK, and the counter will start counting after the pin CNT0_GATE is triggered. If you select Pulse Out, the clock source will be output to pin CNT0_OUT. You can configure the Pulse Frequency by the scroll bar right below it.
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3 Chapter 3 3. Signal Connections Chapter 3.1 Overview Maintaining signal connections is one of the most important factors in ensuring that your application system is sending and receiving data correctly. A good signal connection can avoid unnecessary and costly damage to your PC and other hardware devices. This chapter provides useful information about how to connect input and output signals to the PCI-1710/1710L/1710HG/1710HGL/1711/1711L/1716/1716L via the I/ O connector. 3.
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Chapter 3 AI0 68 34 AI1 AI2 67 33 AI3 AI4 66 32 AI5 AI6 65 31 AI7 AI8 64 30 AI9 AI10 63 29 AI11 AI12 62 28 AI13 AI14 61 27 AI15 AIGND 60 26 AIGND AO0_REF* 59 25 AO1_REF* AO0_OUT* 58 24 AO1_OUT* AOGND* 57 23 AOGND* DI0 56 22 DI1 DI2 55 21 DI3 DI4 54 20 DI5 DI6 53 19 DI7 DI8 52 18 DI9 DI10 51 17 DI11 DI12 50 16 DI13 DI14 49 15 DI15 DGND 48 14 DGND DO0 47 13 DO1 DO2 46 12 DO3 DO4 45 11 DO5 DO6 44 10 DO7 DO8 43
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Chapter 3 I/O Connector Signal Description Table 3-1: I/O Connector Signal Description Signal Name Reference Direction Description AI<0...15> AIGND Input Analog Input Channels 0 through 15. Each channel pair, AI (i = 0, 2, 4...14), can be configured as either two single-ended inputs or one differential input of PCI-1710/1710L/ 1710HG/1710HGL/1716/1716L. AIGND - - Analog Input Ground.
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Chapter 3 3.3 Analog Input Connections The PCI-1710/1710L/1710HG/1710HGL/1716/1716L supports both 16channel Single-Ended or 8 differential A/D Input, however the PCI1711/1711L only supports 16 single-ended analog inputs. Each individual input channel is software-selected. Single-ended Channel Connections The single-ended input configuration has only one signal wire for each channel, and the measured voltage (Vm) is the voltage of the wire as referenced against the common ground.
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Chapter 3 If one side of the signal source is connected to a local ground, the signal source is ground-referenced. Therefore, the ground of the signal source and the ground of the card will not be exactly of the same voltage. The difference between the ground voltages forms a commonmode voltage (Vcm ). To avoid the ground loop noise effect caused by common-mode voltages, you can connect the signal ground to the Low input.
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Chapter 3 Figure 3-4: Differential input channel connection - floating signal source However, this connection has the disadvantage of loading the source down with the series combination (sum) of the two resistors. For ra and rb, for example, if the input impedance rs is 1 kW, and each of the two resistors is 100 kW, then the resistors load down the signal source with 200 kΩ (100 kΩ+ 100 kΩ), resulting in a -0.5% gain error.
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Chapter 3 3.4 Analog Output Connections The PCI-1710/1710HG/1711/1716 provides two D/A output channels (PCI-1710L/1710HGL/1711L/1716L are not designed to have this function), AO0_OUT and AO1_OUT. Users may use the PCI-1710/ 1710HG/1711/1716 internally-provided precision -5V (-10V) reference to generate 0 to +5 V (+10 V) D/A output range. Users also may create D/ A output range through external references, AO0_REF and AO1_REF. The external reference input range is +/-10 V.
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Chapter 3 3.5 Trigger Source Connections Internal Pacer Trigger Connection The PCI-1710/1710L/1710HG/1710HGL/1711/1711L/1716/1716L includes one 82C54 compatible programmable Timer/Counter chip which provides three 16-bit counters connected to a Oscillator, each designated specifically as Counter 0, Counter 1 and Counter 2. Counter 0 is a counter which counts events from an input channel or outputing pulse. Counter 1 and Counter 2 are cascaded to create a 32-bit timer for pacer triggering.
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Chapter 3 3.6 Field Wiring Considerations When you use the PCI-1710/1710L/1710HG/1710HGL/1711/1711L/1716/ 1716L to acquire data from outside, noises in the environment might significantly affect the accuracy of your measurements if due cautions are not taken. The following measures will be helpful to reduce possible interference running signal wires between signal sources and the PCI-1710/1710L/1710HG/1710HGL/1711/1711L/1716/1716L.
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Chapter 3 This page is left blank on purpose. PCI-1710 series User’s Manual – 32 – Advantech Co., Ltd. www.advantech.
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4 Chapter 4 4. Software Overview Chapter This chapter gives you an overview of the software programming choices available and a quick reference to source codes examples that can help you be better oriented to programming. After following the instructions given in Chapter 2, it is hoped that you feel comfortable enough to proceed further. Programming choices for DAS cards: You may use Advantech application software such as Advantech DLL driver.
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Chapter 4 4.2 DLL Driver Programming Roadmap This section will provide you a roadmap to demonstrate how to build an application from scratch using Advantech DLL driver with your favorite development tools such as Visual C++, Visual Basic, Delphi and C++ Builder. The step-by-step instructions on how to build your own applications using each development tool will be given in the DLL Drivers Manual. Moreover, a rich set of example source codes are also given for your reference.
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Chapter 4 Programming with DLL Driver Function Library Advanech DLL driver offers a rich function library to be utilized in various application programs. This function library consists of numerous APIs that support many development tools, such as Visual C++, Visual Basic, Delphi and C++ Builder.
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Chapter 4 This page is left blank on purpose. PCI-1710 series User’s Manual – 36 – Advantech Co., Ltd. www.advantech.
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5 Chapter 5 Chapter 5. Calibration This chapter provides brief information on PCI-1710/1710L/1710HG/ 1710HGL/1711/1711L/1716/1716L calibration. Regular calibration checks are important to maintain accuracy in data acquisition and control applications. We provide the calibration programs or utility on the companion CD-ROM to assist you in A/D and D/A calibration.
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Chapter 5 5.1 PCI-1710/1710L/1710HG/1710HGL Calibration Two calibration programs are included on the companion CD-ROM : ADCAL.EXE A/D calibration program DACAL.EXE D/A calibration program (only for PCI-1710/1710HG) These calibration programs are designed only for the DOS environment.
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Chapter 5 A/D Calibration Regular and accurate calibration procedures ensure the maximum possible accuracy. The ADCAL.EXE calibration program leads you through the whole A/D offset and gain adjustment procedure. The basic steps are outlined below: 1. Set analog input channel AI0 as single-ended, bipolar, range ±5 V, and set AI1 as single-ended, unipolar, range 0 to 10 V. 2. Connect a DC voltage source with value equal to 0.5 LSB (-4.9959 V) to AI0. 3.
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Chapter 5 Note: ✎ Using a precision voltmeter to calibrate the D/A outputs is recommended. Set the D/A data register to 4095 and adjust VR3 until the D/A output voltage equals the reference voltage minus 1 LSB, but with the opposite sign. For example, if V ref is -5 V, then V out should be +4.9959 V. If V ref is -10 V, V out should be +9.9918 V. Self A/D Calibration Under many conditions, it is difficult to find a good enough DC voltage source for A/D calibration.
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Chapter 5 5.2 PCI-1711/1711L Calibration Three calibration programs are included on the companion CD-ROM : ADCAL.EXE A/D calibration program DACAL.EXE D/A calibration program (only for PCI-1711) SELFCAL.EXE D/A self-calibration program (only for PCI-1711) These calibration programs are designed only for the DOS environment.
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Chapter 5 A/D Calibration Regular and accurate calibration procedures ensure the maximum possible accuracy. The A/D calibration program ADCAL.EXE leads you through the whole A/D offset and gain adjustment procedure. The basic steps are outlined below: 1. Connect a DC voltage source of +9.995 V to AI0. 2. Connect AGND to AI1, AI2, AI3, AI4 and AI5. 3. Run the ADCAL.EXE program. 4.
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Chapter 5 Self A/D Calibration We know, in most cases, it is difficult to find a good enough DC voltage source for A/D calibration. We provide a self-adjusted A/D calibration program “SELFCAL.EXE” to help solve this problem. The steps of self-calibration are outlined as below: 1. Connect DA0_OUT to AI0. 2. Connect AGND to AI1, AI2, AI3, AI4 and AI5. 3. Run the SELFCAL.EXE program. 4. First calibrate the D/A channel. Adjust VR3 until the DA0_OUT output voltage approaches +10V. Then press the SPACE key. 5.
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Chapter 5 PCI-1716 Series P1 VR1 TP4 SW1 Figure 5-3: PCI-1716/1716L VR assignment Calibration Utility The calibration utility, AutoCali, provides four functions - auto A/D calibration, auto D/A calibration, manual A/D calibration and manual D/A calibration. The program helps the user to easily finish the calibration procedures automatically; however, the user can calibrate the PCI1716/1716L manually. Appendix E illustrated the standard calibration procedures for your reference.
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Chapter 5 Figure 5-4: Selecting the device you want to calibrate Step 3: After you start to calibrate the PCI-1716/1716L, please don’t forget to adjust VR1. Figure 5-5: Warning message before start calibration Advantech Co., Ltd. www.advantech.
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Chapter 5 A/D channel Auto-Calibration Step 4: Click the Auto A/D Calibration tab to show the A/D channel auto-calibration panel (Fig. 5-6). Press the start button to calibrate A/D channels automatically. Figure 5-6: Auto A/D Calibration Dialog Box Step 5: The first A/D calibration procedure is enabled (Fig. 5-7). Figure 5-7: A/D Calibration Procedure 1 PCI-1710 series User’s Manual – 46 – Advantech Co., Ltd. www.advantech.
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Chapter 5 Step 6: The second A/D calibration procedure is enabled (Fig. 5-8) Figure 5-8: A/D Calibration Procedure 2 Step 7: The third A/D calibration procedure is enabled (Fig. 5-9) Figure 5-9: A/D Calibration Procedure 3 Advantech Co., Ltd. www.advantech.
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Chapter 5 Step 8: Auto-calibration is finished. (See fig. 5-10) Figure 5-10: A/D Calibration is finished D/A channel Auto-Calibration Step 9: Click the Auto D/A Calibration tab to show the D/A channel auto calibration panel. Please finish the A/D calibration procedure first before you start the D/A calibration procedure. There are two D/A channels in PCI-1716; select the output range for each channel and then press the start button to calibrate D/A channels (Fig. 5-11).
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Chapter 5 Step 10: D/A channel 0 calibration is enabled (Fig. 5-12) Figure 5-12: Calibrating D/A Channel 0 Step 11: D/A channel 1 calibration is enabled (Fig. 5-13) Figure 5-13: Calibrating D/A Channel 1 Advantech Co., Ltd. www.advantech.
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Chapter 5 Step 12: Auto-calibration is finished (Fig. 5-14) Figure 5-14: D/A Calibration is finished A/D channel Manual-Calibration Step 1: Click the Manual A/D Calibration tab to show the A/D channel manual calibration panel. Before calibrating, acquire the reference voltage from a precision standard voltage reference. Go to the Range form, select a channel and the target voltage range according to the input voltage value from a precision standard voltage reference(Fig. 5-15).
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Chapter 5 Figure 5-15: Selecting Input Rage in Manual A/D Calibration panel Step 2: According to the difference between reference voltage and receiving data in PCI-1716/1716L, adjust the gain, bipolar offset and unipolar offset registers (Figure 5-16) Figure 5-16: Adjusting registers Advantech Co., Ltd. www.advantech.
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Chapter 5 Step 3: Adjust the registers until they fall between the input voltage from the standard voltage reference and the receiving voltage reflectected in the Manual A/D Calibration tab. D/A channel Manual-Calibration Step 1: Click the Manual D/A Calibration tab to show the D/A channel manual calibration panel. Two D/A channels are individually calibrated . Before calibrating, output desired voltage from the D/A channels and measure it through an external precision multimeter.
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Chapter 5 Step 3: According to the difference between the output voltage from D/A channel and the value in the multimeter, adjust the gain, bipolar offset and unipolar offset registers (Fig. 5-19) Figure 5-19: Adjusting registers Step 4: Adjust registers until they fall between the output voltage from the D/A channel and the value in the multimeter. Advantech Co., Ltd. www.advantech.
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Chapter 5 This page is left blank on purpose. PCI-1710 series User’s Manual – 54 – Advantech Co., Ltd. www.advantech.
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A Appendix A Appendix A. Specifications PCI-1710/1710L/1710HG/1710HGL Analog Input: Channels Resolution FIFO Size PCI-1710/1710L Max. Sampling Rate1 16 single-ended or 8 differential or combination 12-bit 4K samples 100 KS/s Gain Speed PCI-1710HG/1710HGL Max. Sampling Rate 0.5, 1 100 KS/s 5, 10 35 KS/s Conversion Time Input range and Gain List for PCI1710HG/1710HGL Gain Small Signal Bandwidth for PGA Zero (µV/º C) Gain (ppm//º C) Gain Bandwidth Common mode voltage Max.
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Appendix A Analog Output: Channels 2 Resolution 12-bit Output Range (Internal & External Reference) Accuracy Using Internal Reference 0~+5V,0~+10 V Using External Reference 0 ~ +x V @ +x V (-10≤ x ≤ 10) Relative ±0.5 LSB Differential Non-linearity Gain Error ±0.5 LSB (monotonic) Adjustable to zero Slew Rate 10V/µs Drift 40 ppm/° C Driving Capability 3 mA Max. Update Rate 100 K samples/s Output Impedance 0.81 Ω (min.
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Appendix A Counter/Timer: Channels 3 channels, 2 channels are permanently configured as programmable pacers; 1 channel is free for user application Resolution 16-bit Compatibility TTL level Base Clock Channel 2: Takes input from output of channel 1 Channel 1: 1MHz Channel 0: Internal 100kHz or external clock (1 MHz) max Selected by software Max. Input Frequency Clock Input Gate Input Counter Output 1 MHz Low 0.8 V max. High 2.0 V min. Low 0.8 V max. High 2.0 V min. Low 0.5 V max.
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Appendix A PCI-1711/1711L Analog Input: Channels 16 Single-Ended Resolution 12-bit FIFO Size 1K samples Max. Sampling Rate 100 KS/s max. Conversion Time 10 µs Input range and Gain List Gain 1 2 4 Input ± 10 V ±5V ± 2.5 V Drift (ppm/°C) 1 2 4 8 Zero 15 15 15 15 15 Gain 25 25 25 30 40 4 8 16 Small Signal Bandwidth for PGA 1 Bandwidth 4.0 MHz 2 2.0 MHz Max. Input Overvoltage 8 16 ± 1.25 V ± 0.625 V 16 1.5 MHz 0.65 MHz 0.
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Appendix A Analog Output: (Only for PCI-1711) Channels Resolution Output Range (Internal & External Reference) Accuracy 2 12-bit Internal Reference 0 ~ +5 V, 0 ~ +10 V External Reference 0 ~ +x V@ -x V (-10≤ x ≤10) Relative ±1/2 LSB Differential Non-linearity ±1/2 LSB Gain Error Slew Rate Drift Driving Capability Throughput Output Impedance Settling Time Reference Voltage Internal External Adjustable to zero 11V/µs 40 ppm/° C 3 mA 38 kHz (min.) 0.
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Appendix A Progrmmable Counter/Timer: Channels 3 channels, 2 channels are permanently configured as programmable pacers; 1 channel is free for user application Resolution 16-bit Compatibility TTL level Base Clock Channel 2: Takes input from output of channel 1 Channel 1: 10 MHz Channel 0: Internal 1MHz or external clock (10 MHz) max Selected by software Max. Input Frequency 1 MHz Clock Input Gate Input Counter Output Low 0.8 V max. High 2.0 V min. Low 0.8 V max. High 2.0 V min. Low 0.
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Appendix A PCI-1716/1716L Analog Input: Channels Resolution 16 single-ended or 8ndifferential or combinatio 16-bit 1K samples 250 kS/s max. FIFO Size Sampling Rate* Conversion Time 2.5 µs Gain Unipolar Bipolar Input rang and Gain List Small Signal Gain Bandwidth for Bandwidth PGA Gain Common mode voltage Max. Input voltage Input Protect Input Impedance Trgger Mode 1 0~10 ±5 2 0~5 ±2.5 4 0~2.5 ±1.25 8 0~1.2 ±0.625 0.5 1 2 4 8 4.0 MHz 4.0 MHz 2.0 MHz 1.5 MHz 0.65 MHz ±11 V max.
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Appendix A Analog Output: (Only for PCI-1716) Channels Resolution Operation mode Throughput* 2 16-bit Single output 200 kS/s max.
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Appendix A Counter/Timer: Channels 3 channels, 2 channels are permanently configured as programmable pacers; 1 channel is free for user application Resolution 16-bit Compatibility TTL level Base Clock Channel 2: Takes input from output of channel 1 Channel 1: 10 MHz Channel 0: Internal 1MHz or external clock (10 MHz) max Selected by software Max. Input Frequency 1 MHz Clock Input Gate Input Counter Output Low 0.8 V max. High 2.0 V min. Low 0.8 V max. High 2.0 V min. Low 0.5 V max.
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Appendix A This page is left blank on purpose. PCI-1710 series User’s Manual – 64 – Advantech Co., Ltd. www.advantech.
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B Appendix B Appendix B.
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Appendix B PCI-1711/1711L Address Bus Address Decoder PCI Controller P C I B us Data Bus INT 16-bit Digital Output 16-bit Digital Input A/D & D/A Status Control Logic 12-bit D/A Output 0 12-bit D/A Output 1 CNT0_CLK 1K Samples FIFO 10 MHz/10= 1 MHZ IRQ Control Logic COUNTER 0 CNT0_OUT CNT0_GATE COUNTER 1 10 MHz OSC 12-bit A/D Convertor COUNTER 2 A/D Trigger Logic PACER_OUT EXT_TRG S/W_TRG AI0 + PGIA - AI1 Multiplexer 16 S/E Channel Scan Logic Gain Control RAM AI15 PCI-1710 serie
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Appendix B PCI-1716/1716L Address Bus Address Decoder PCI Controller P C I B us Data Bus INT 16-bit Digital Output 16-bit Digital Input A/D & D/A Status Control Logic 16-bit D/A Output 0 16-bit D/A Output 1 CNT0_CLK 1K Samples FIFO IRQ Control Logic 10 MHz/10= 1 MHz COUNTER 0 CNT0_OUT CNT0_GATE COUNTER 1 10 MHz OSC 12-bit A/D Convertor COUNTER 2 A/D Trigger Logic PACER_OUT EXT_TRG S/W_TRG AI0 + PGIA - AI1 Multiplexer 16 S/E or 8 DIFF Channel Scan Logic Gain Control RAM AI15 Adva
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Appendix B This page is left blank on purpose. PCI-1710 series User’s Manual – 68 – Advantech Co., Ltd. www.advantech.
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C Appendix C Appendix C. Register Structure and Format C.1 Overview The PCI-1710/1710L/1710HG/1710HGL/1711/1711L/1716/1716L is delivered with an easy-to-use 32-bit DLL driver for user programming under the Windows 95/98/NT/2000 operating system. We advise users to program the PCI-1710/1710L/1710HG/1710HGL/1711/1711L/1716/ 1716L using the 32-bit DLL driver provided by Advantech to avoid the complexity of low-level programming by register.
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Appendix C C.2 I/O Port Address Map The PCI-1710/1710L/1710HG/1710HGL/1711/1711L/1716/1716L requires 32 consecutive addresses in the PC’s I/O space. The address of each register is specified as an offset from the card’s base address. For example, BASE+0 is the card’s base address and BASE+7 is the base address plus seven bytes. The table C-1 shows the function of each register of the PCI-1710/ 1710L/1710HG/1710HGL/1711/1711L/1716/1716L or driver and its address relative to the card’s base address.
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Appendix C Table C-1: PCI-1716/1716L register format (Part 2) Base Address +decimal Read 7 6 5 4 3 2 1 0 A/D Data 1 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 0 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 IRQ F/F F/H F/E GATE EXT PACER SW N/A 3 2 N/A 5 4 A/D Status Register 7 CAL 6 AD16/12 CNT0 ONE/FH IRQEN N/A 9 8 D/A channel 0 data 11 10 D/A channel 1 data 13 12 N/A 15 14 Advantech Co., Ltd. www.advantech.
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Appendix C Table C-1: PCI-1710/1710L/1710HG/1710HGL/1711/1711L/1716/ 1716L register format (Part 3) -Base Address +decimal 7 6 5 4 17 DI15 DI14 DI13 DI12 16 DI7 DI6 DI5 DI4 Read 3 2 1 0 DI11 DI10 DI9 DI8 DI3 DI2 DI1 DI0 BD2 BD1 BD0 D2 D1 D0 D2 D1 D0 D2 D1 D0 Digital Input N/A 19 18 Board ID (only for PCI-1716/1716L) 21 20 BD3 N/A 23 22 Counter 0 25 24 D7 D6 D5 D4 D3 Counter 1 27 26 D7 D6 D5 D4 D3 Counter 2 29 28 D7 D6 D5 D4 D3 N/A 31 30 PCI-1710 s
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Appendix C Table C-1: PCI-1710/1710L/1710HG/1710HGL/1711/1711L register format (Part 4) Base Address +decimal Write 7 6 5 4 3 2 1 0 G1 G0 Software A/D Trigger 1 0 A/D Channel Range Setting 3 2 *S/D *B/U G2 Multiplexer Control 5 Stop channel 4 Start channel A/D Control Register 7 6 CNT0 ONE/FH IRQEN GATE EXT0 PACER SW Clear Interrupt and FIFO 9 Clear FIFO 8 Clear interrupt D/A Output Channel 0 11 10 DA7 DA6 DA5 DA4 DA11 DA10 DA9 DA8 DA3 DA2 DA1 DA0 D/A Output Channe
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Appendix C Table C-1: PCI-1716/1716L register format (Part 5) Base Address +decimal Write 7 6 5 4 3 2 1 0 G1 G0 Software A/D Trigger 1 0 A/D Channel Range Setting 3 2 S/D B/U G2 Multiplexer Control 5 Stop channel 4 Start channel A/D Control Register 7 6 CAL AD16/12 CNT0 ONE /FH IRQEN GATE EXT0 PACER SW Clear Interrupt and FIFO 9 Clear FIFO 8 Clear interrupt D/A Output Channel 0 11 DA15 DA14 DA13 DA12 DA11 DA10 DA9 DA8 10 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 13 DA
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Appendix C Table C-1: PCI-1710/1710L/1710HG/1710HGL/1711/1711L/1716/ 1716L register format (Part 6) Base Address +decimal 7 6 5 17 DO15 DO14 DO13 DO12 16 DO7 DO6 DO5 DO4 Read 4 3 2 1 0 DO11 DO10 DOI9 DO8 DO3 DO2 DO1 DO0 Digital Output Calibration Command and Data (only for PCI-1716/1716L) 19 18 D7 D6 D5 D4 CM3 CM2 CM1 CM0 D3 D2 D1 D0 D2 D1 D0 D2 D1 D0 D2 D1 D0 D2 D1 D0 N/A 21 20 N/A 23 22 Counter 0 25 24 D7 D6 D5 D4 D3 Counter 1 27 26 D7 D6 D5 D
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Appendix C C.3 Channel Number and A/D Data - BASE+0 and BASE+1 BASE+0 and BASE+1 hold the result of A/D conversion data. For PCI-1710/1710L/1710HG/1710HGL/1711/1711L, the 12 bits of data from the A/D conversion are stored in BASE+1 bit 3 to bit 0 and BASE+0 bit 7 to bit 0.BASE+1 bit 7 to bit 4 hold the source A/D channel number.
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Appendix C C.4 Software A/D Trigger - BASE+0 You can trigger an A/D conversion by software, the card’s on-board pacer or an external pulse. BASE+6, Bit 2 to bit 0, select the trigger source. (see Section C.7, Control Register — BASE+6 ) If you select software triggering, a write to the register BASE+0 with any value will trigger an A/D conversion. Advantech Co., Ltd. www.advantech.
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Appendix C C.5 A/D Channel Range Setting - BASE+2 Each A/D channel has its own input range, controlled by a gain code stored in the on-board RAM. To change the range code for a channel: • Write the same channel in BASE+4 (the start channel) and BASE+5 (the stop channel) (refer to Section C.6). • Write the gain code to BASE+2 bit 0 to bit 2.
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Appendix C Table C-5: Gain codes for PCI-1710/1710L PCI-1710/1710L Gain Input Range(V) B/U 1 -5 to +5 2 Gain Code G2 G1 G0 0 0 0 0 -2.5 to +2.5 0 0 0 1 4 -1.25 to +1.25 0 0 1 0 8 -0.625 to +0.625 0 0 1 1 0.5 -10 to +10 0 1 0 0 N/A 0 1 0 1 N/A 0 1 1 0 1 N/A 0 1 1 1 0 to 10 1 0 0 0 2 0 to 5 1 0 0 1 4 0 to 2.5 1 0 1 0 8 0 to 1.25 1 0 1 1 0 Advantech Co., Ltd. www.advantech.
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Appendix C Table C-6: Gain codes for PCI-1710HG/1710HGL PCI-1710HG/1710HGL Gain Code Gain Input Range(V) B/U G2 G1 G0 1 -5 to +5 0 0 0 0 10 -0.5 to +0.5 0 0 0 1 100 -0.05 to +0.05 0 0 1 0 1000 -0.005 to +0.005 0 0 1 1 0.5 -10 to +10 0 1 0 0 5 -1 to +1 0 1 0 1 50 -0.1 to +0.1 0 1 1 0 500 -0.01 to +0.01 0 1 1 1 1 0 to 10 1 0 0 0 10 0 to 1 1 0 0 1 100 0 to 0.1 1 0 1 0 1000 0 to 0.
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Appendix C C.6 MUX Control - BASE+4 and BASE+5 Table C-8: Register for multiplexer control Write Bit # BASE + 5 BASE + 4 7 6 5 Multiplexer Control 4 3 STO3 STA3 STA3 ~ STA0 Start Scan Channel Number STO3 ~ STO0 Stop Scan Channel Number • 2 STO2 STA2 1 STO1 STA1 0 STO0 STA0 When you set the gain code of analog input channel n, you should set the Multiplexer start & stop channel number to channel n to prevent any unexpected errors.
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Appendix C Example 2 If the start scan channel is AI13 and the stop scan channel is AI2, then the scan sequence is AI13, AI14, AI15, AI0, AI1, AI2, AI13, AI14, AI15, AI0, AI1, AI2, AI13, AI14... The scan logic of the PCI-1710/1710L/1710HG/1710HGL/1716/1716L card is powerful and easily understood. You can set the gain code, B/U and S/D, for each channel. For the Analog Input function, we set two AI channel AI ( i= 0, 2, 4, ...,14) work as a pair. For example, the AI0 and AI1 is a pair.
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Appendix C C.7 Control Register - BASE+6 The write-only register BASE+6 and BASE+7 allows users to set an A/D trigger source and an interrupt source. Table C-9: Control Register Write Bit # 7 BASE + 7 * CAL BASE + 6 *AD16/12 A/D Status Register 4 3 6 5 CNT0 ONE/FH IRQEN GATE 2 1 0 EXT PACER SW *: AD16/12 and CAL are only supported for PCI-1716/1716L SW Software trigger enable bit 1 enable; 0 disable. PACER Pacer trigger enable bit 1 enable; 0 disable.
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Appendix C maximum up to 1 MHz for PCI-1710/1710L/ 1710HG/1710HGL AD16/12 Analog Input resolution. 0 16 bit 1 12 bit. And those two registers BASE+0 & BASE+1 will the same as PCI-1710/1710L/ 1710HG/1710HGL/1711/1711L (Table C-2) CAL Analog I/O calibration bit 0 Normal mode All analog input and outputs channels are connected to 68 pin SCSI-II connector respectively.
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Appendix C C.8 Status Register - BASE+6 and BASE+7 The registers of BASE+6 and BASE+7 provide information for A/D configuration and operation. Table C-10: Status Register Write Bit # 7 BASE + 7 * CAL BASE + 6 *AD16/12 6 CNT0 A/D Control Register 4 3 IRQ ONE/FH IRQEN GATE 5 2 F/F EXT 1 F/H PACER 0 F/E SW *: CAL is only supported for PCI-1716/1716L The content of the status register of BASE+6 is the same as that of the control register. F/E FIFO Empty flag This bit indicates whether the FIFO is empty.
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Appendix C C.9 Clear Interrupt and FIFO - BASE+8 and BASE+9 Writing data to either of these two bytes clears the interrupt or the FIFO. Table C-11: Register to clear interrupt and FIFO Write Bit # BASE + 9 BASE + 8 7 6 5 Clear Interrupt and FIFO 4 3 Clear FIFO Clear Interrupt 2 1 0 C.10 D/A Output Channel 0 - BASE+10 and BASE+11 The PCI-1716 provides the innovative design as gate control for Analog Output function.
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Appendix C C.11 D/A Output Channel 0 - BASE+10 and BASE+11 The write-only registers of BASE+10 and BASE+11 accept data for D/ A Channel 0 output. PCI-1710L/1710HGL/1711L/1716L The PCI-1710L/1710HGL/1711L/1716L is not equipped with the D/A functions.
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Appendix C C.13 D/A Output Channel 1 - BASE+12 and BASE+13 The write-only registers of BASE+12 and BASE+13 accept data for D/ A channel 1 output. PCI-1710L/1710HGL/1711L/1716L The PCI-1710L/1710HGL/1711L/1716L is not equipped with the D/A functions.
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Appendix C C.14 D/A Reference Control -BASE+14 The write-only register of BASE+14 allows users to set the D/A reference source. PCI-1710L/1710HGL/1711L/1716L The PCI-1710L/1710HGL/1711L/1716L is not equipped with the D/A functions.
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Appendix C C.15 Digital I/O Registers - BASE+16 and BASE+17 The PCI-1710/1710L/1710HG/1710HG/1711/1711L/1716/1716L offers 16 digital input channels and 16 digital output channels. These I/O channels use the input and output ports at addresses BASE+16 and BASE+17.
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Appendix C C.16 Calibration Registers - BASE+18 and BASE+19 The PCI-1716/1716L offers Calibration registers BASE+16 and BASE+17 for user to calibrate the A/D and D/A. Table C-20: Calibration Command and Data Register Write Bit # BASE + 19 BASE + 18 7 6 D7 D6 Calibration Command and Data 4 3 2 CM3 CM2 D5 D4 D3 D2 5 1 CM1 D1 D7 to D0 Calibration data D0 LSB of the calibration data D7 MSB of the calibration data CM3 to CM0 Calibration Command and table C-18 lists the command code for PCI-1716/1716L.
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Appendix C C.17 Board ID Registers - BASE+20 The PCI-1716/1716L offers Board ID register BASE+20. With correct Board ID settings, user can easily identify and access each card during hardware configuration and software programming. Table C-22: Register for Board ID Read Bit # BASE + 20 7 6 5 Board ID 4 3 BD3 2 BD2 1 BD1 0 BD0 C.
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D Appendix D D. 82C54 Counter Function Appendix D.1 The Intel 82C54 The PCI-1710/1710L/1710HG/1710HGL/1711/1711L/1716/1716L uses one Intel 82C54 compatible programmable interval timer/counter chip. The popular 82C54 offers three independent 16-bit counters, counter 0, counter 1 and counter 2. Each counter has a clock input, control gate and an output. You can program each counter for maximum count values from 2 to 65535. The 82C54 has a maximum input clock frequency of 10 MHz.
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Appendix D D.2 Counter Read/Write and Control Registers The 82C54 programmable interval timer uses four registers at addresses BASE + 24(Dec), BASE + 26(Dec), BASE + 28(Dec) and BASE + 30(Dec) for read, write and control of counter functions.
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Appendix D M2, M1 & M0 Select operating mode M2 0 0 X X 1 1 M1 0 0 1 1 0 0 M0 0 1 0 1 0 1 Mode 0 1 2 3 4 5 Description Stop on terminal count Programmable one shot Rate generator Square wave rate generator Software triggered strobe Hardware triggered strobe BCD Select binary or BCD counting BCD 0 1 Type Binary counting 16-bits Binary coded decimal (BCD) counting If you set the module for binary counting, the count can be any number from 0 up to 65535.
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Appendix D BASE+24/26/28 (Dec) Status read-back mode Bit D7 D6 D5 D4 D3 D2 Value OUT NC RW1 RW0 M2 M1 D1 M0 D0 BCD OUT Current state of counter output NC Null count is 1 when the last count written to the counter register has been loaded into the counting element D.3 Counter Operating Modes MODE 0 Stop on Terminal Count The output will initially be low after you set this mode of operation.
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Appendix D The gate input, when low, will force the output high. When the gate input goes high, the counter will start from the initial count. You can thus use the gate input to synchronize the counter. With this mode the output will remain high until you load the count register. You can also synchronize the output by software.
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Appendix D D.4 Counter Operations Read/Write Operation Before you write the initial count to each counter, you must first specify the read/write operation type, operating mode and counter type in the control byte and write the control byte to the control register [BASE + 30(Dec)].
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Appendix D The 82C54 supports the counter latch operation in two ways. The first way is to set bits RW1 and RW0 to 0. This latches the count of the selected counter in a 16-bit hold register. The second way is to perform a latch operation under the read-back command. Set bits SC1 and SC0 to 1 and CNT = 0. The second method has the advantage of operating several counters at the same time. A subsequent read operation on the selected counter will retrieve the latched value. Advantech Co., Ltd. www.advantech.
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Appendix D This page is left blank on purpose. PCI-1710 series User’s Manual – 100 – Advantech Co., Ltd. www.advantech.
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E Appendix E E. PCI-1716/1716L Calibration (Manually) Appendix E.1 A/D Calibration Regular and proper calibration procedures ensure the maximum possible accuracy. It is easy to complete the A/D calibration procedure automatically (i.e. through software calibration) by executing the A/D calibration program AutoCali. Therefore, it is not necessary to adjust the hardware settings of the PCI-1716/1716L.
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Appendix E 6. Adjust UNIPOLAR offset voltage. First, writing any value to BASE+9 to clear FIFO. Then to set A/D channel to channel 0, and to set the range as 0 V to 10 V. 7. Writing the value from 0x0100 to 0x01FF sequentially to Calibration Command and Data register (BASE+18), and get each bipolar range’s data by software trigger A/D method. Be noted that to repeat this procedure 1000 times then to average those data for each value. After that, to see whether the average data is close to 32767.5.
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Appendix E E.2 D/A Calibration (for PCI-1716 only) You can select an on-board +5V or +10V internal reference voltage or an external voltage as your analog output reference voltage. If you use an external reference, connect the reference voltage within the ±10V range to the reference input of the D/A output channel you want to calibrate. Then adjust the gain value, unipolar offset voltage, bipolar offset voltage, respectively, of D/A channels 0 and 1 with the Calibration Command and Data register (BASE+18).
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Appendix E 4. Adjust GAIN 5V calibration. First, writing any value to BASE+9 to clear FIFO. Then to set the A/D range as -5 V to +5 V, and to set the D/A range as 0 V to 5 V. Next, writing 0xFFFF to corresponding D/A registers (BASE+10 and BASE+12). 5. Writing the value from 0x0500 to 0x05FF sequentially to Calibration Command and Data register (BASE+18), and get each bipolar range’s data by software trigger A/D method.
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Appendix E Table E-2: D/A binary code table A/D code Hex. Mapping Voltage Dec. Bipolar Unipolar 0000h 0 -FS 0 7FFFh 32767 -1 LSB 0.5 FS - 1 LSB 8000h 32768 0 0.5 FS FFFFh 65535 +FS - 1 LSB FS - 1 LSB Note: ✎ 1 LSB = FS / 65535 for Unipolar (For example: 1LSB = 10 / 65535, while the range is 0 V to10 V) ✎ 1 LSB = +FS / 32768 for Bipolar (For example: 1LSB = 5 / 32768, while the range is -5 V to +5 V) Advantech Co., Ltd. www.advantech.
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Appendix E This page is left blank on purpose. PCI-1710 series User’s Manual – 106 – Advantech Co., Ltd. www.advantech.
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F Appendix F Appendix F. Screw-terminal Bord F.1 Introduction The PCLD-8710 Screw-terminal Board provides convenient and reliable signal wiring for the PCI-1710 series card, both of which have a 68-pin SCSI-II connector. This screw terminal board also includes cold junction sensing circuitry that allows direct measurement of thermocouples trans-ducers. Together with software compensation and linearization,every thermocouple type can be accommodated.
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Appendix F F.3 Applications • F.4 Field wiring for the PCI-1710 series card equipped with 68-pinSCSIII connector. Board Layout PCLD-8710 WIRING TERMINAL BOARD REV.
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Appendix F F.5 Pin Assignment CN2 DO 0 1 2 DO 1 DO 2 3 4 DO 3 DO 4 5 6 DO 5 DO 6 7 8 DO 7 DO 8 9 10 DO 9 DO 10 11 12 DO 11 DO 12 13 14 DO 13 DO 14 15 16 DO 15 DGND 17 19 +5 V 18 DGND 20 +12 V CN3 Advantech Co., Ltd. www.advantech.
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Appendix F F.