Specifications

88
Analog Output
Channels 2
Resolution 12-bit
Using Internal
Reference
0 ~ +5V, 0 ~ +10 V
Output Range
(Internal & External
Reference)
Using External
Reference
0 ~ + x V @ + x V ( - 10 ≦ x
≦ 10 )
Relative ±0.5 LSB
Accuracy
Differential
Non-linearity
±0.5 LSB (monotonic)
Gain Error Adjustable to zero
Slew Rate
10 V /µ s
Drift 40 ppm / °C
Driving Capability 3 mA
Max. Update Rate 100 K samples /s
Output Impedance
0.81O ( min)
Digital Rate
5 M Hz
Settling Time
26µ s ( to ± 1/2 LSB of FSR )
Internal - 5V ~+ 5V
Reference Voltage
External - 10V ~+10V
Digital Input/Output
Input Channels 16
Low 0.4 V max.
Input Voltage
High 2.4V min.
Low 0.4 V max. @ - 0.2mA
Input Load
High
2.7V min. @ 20µ A
Output Channels 16
Low 0.4 V max. @ + 8.0 mA (sink)
Output Voltage
High 2.4V min. @ - 0.4 mA (source)
Counter/Timer
Channels
3 channels, 2 channels are permanently
configured as programmable pacers;1 channel
is free for user application
Resolution 16-bit
Compatibility TTL level
Base Clock
Channel 2:Takes input from output of channel 1
Channel 1:1MHz
Channel 0: Internal 100kHz or external clock ( 1
MHz ) max Selected by software
Max. Input
Frequency
1 M Hz
Low 0.8 V max.
Clock Input
High 2.0 V min.
Low 0.8 V max.
Gate Input
High 2.0 V min.
Low 0.5 V max. @ +24mA
Counter Output
High 2.4 V min. @ -15mA