Specifications

119
IRQEN Interrupt enable bit.
0 Disable
1 Enable
ONE/FH Interrupt source bit
0 Interrupt when an A/D conversion occurs
1 Interrupt when the FIFO is half full.
CNT0 Counter 0 clock source select bit
0 The clock source of Counter 0 comes from the
internal clock
1 MHz for PCI-1711/1711L/17161716L
100 KHz for PCI-1710/1710L/1710HG/
1710HGL
1 The clock source of Counter 0 comes from the
external clock
maximum up to 10 MHz for PCI-1711/1711L/
1716/1716L
maximum up to 1 MHz for PCI-1710/1710L/
1710HG/1710HGL
AD16/12 Analog Input resolution.
0 16 bit
1 12 bit. And those two registers BASE+0 &
BASE+1 will the same as PCI-1710/1710L/
1710HG/1710HGL/1711/1711L (Table C-2)
CAL Analog I/O calibration bit
0 Normal mode
All analog input and outputs channels are