Specifications

90
A.2 PCI-1711/1711L Specifications
Analog Input
Channels 16 Single-Ended
Resolution 12-bit
FIFO Size 1K samples
Max. Sampling
Rate
100 KS/s max.
Conversion Time 10µs
Gain 1 2 4 8 16
Input R
ange and
Gain List
Input ±10V ±5V ±2.5V ±1.25V ±0.625V
1 2 4 8 16
Zero 15 15 15 15 15
Drift
( ppm / ℃ )
Gain 25 25 25 30 40
1 2 4 8 16 Small Signal
Bandwidth for
PGA
Bandwidth
4.0 M Hz 2.0 M Hz 1.5 M Hz
0.65 M
Hz
0.35 M
Hz
Max. Input
Overvoltage
±15V
Input Protect 30 Vp-p
Input Impedance 2 MO / 5 Pf
Trigger Mode Software, On-board Programmable Pacer or external
INLE: ± 0.5 LSB
Monotonicity: 12 bits
Offset error : Adjustable to zero
DC
Gain error: 0.005% FSR ( Gain=1)
SNR : 68 dB
Accuracy
AC
ENOB: 11 bits
Analog Output (Only for PCI-1711)
Channels 2
Resolution 12-bit
Using Internal
Reference
0 ~ +5V, 0 ~ +10 V
Output Range
(Internal & External
Reference)
Using External
Reference
0 ~ + x V @ + x V
( - 10 ≦ x ≦ 10 )
Relative ±0.5 LSB
Accuracy
Differential
Non-linearity
±0.5 LSB (monotonic)
Gain Error Adjustable to zero
Slew Rate
11 V /µ s
Drift 40 ppm / °C
Driving Capability 3 mA
Throughput 38 kS/s (min.)
Output Impedance
0.81O
Settling Time
26µ s ( to ± 1/2 LSB of FSR )
Internal -5 V or -10 V
Reference Voltage
External - 10V ~+10V