Specifications

74 PCL-743/745 Series User's Manual

This appendix gives short descriptions of each of the module's

registers. For more information please refer to the data book for the

STARTECH 16C550 UART chip.

All registers are one byte. Bit 0 is the least significant bit, and bit 7 is

the most significant bit. The address of each register is specified as an

offset from the port base address (BASE), selected with DIP switch

SW1 or SW2.

DLAB is the "Divisor Latch Access Bit:, bit 7 of BASE+3.

BASE+0 Receiver buffer register when DLAB=0 and the operation

is a read.

BASE+0 Transmitter holding register when DLAB=0 and the

operation is a write.

BASE+0 Divisor latch bits 0 - 7 when DLAB=1.

BASE+1 Divisor latch bits 8 - 15 when DLAB=1

The two bytes BASE+0 and BASE+1 together form a 16-bit number,

the divisor, which determines the baud rate. Set the divisor as follows:

Baud rate Divisor Baud rate Divisor

50 2304 3600 32

75 1536 4800 24

150 768 7200 16

300 384 9600 12

600 192 19200 6

1200 96 38400 3

1800 64 57600 2

2400 48 115200 1