User`s manual

Chapter 1 Hardware Configuration

1.8.4 Watchdog timer configuration (JP7)

An on-board watchdog timer reduces the chance of disruptions which

EMP (electro-magnetic pulse) interference can cause. This is an

invaluable protective device for standalone or unmanned applications.

Setup involves two jumpers and running the control software. (Refer to

Appendix A.)

1.8.5 Watchdog timer action (JP7)

When the watchdog timer activates (CPU processing has come to a

halt), it can reset the system or generate an interrupt on IRQ11. This

can be set via setting JP7 as shown below:

Table 1-7: Watchdog timer system reset/IRQ 11 select (JP7)

*System Reset IRQ 11

JP7

* default setting

1.8.6 COM2 settings for RS-232/422/485 (JP6)

Table 1-8: COM2 settings for RS-232/422/485 (JP6)

Pins closed *RS-232 RS-422 RS-485

1 - 2 open open short

3 - 4 open short open

5 - 6 short open open

* default setting

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