Appendix B. Block Diagram
PCI
Interface
Clock
Divider
PCI
BUS
Address
Decoder
Output
Buffer
Input
Buffer
DI 0~7
DO 0~7
Interrupt
Control
Logic
16-bit
Counter
0~7
Gate
Control
Logic
Clock
Source
Select
Logic
4-bit
Fout 0~7
10 MHz
OSC
Data Bus (D0~D15)
Gate 0~7
Clock 0~7
Out 0~7
Fout 0~3
Address Bus
DI 0
27
