User manual

Period measurement
This approach is a particular fit for a low frequency signal.
CLK
OUT GATE
Counter 0
CLK
OUT GATE
Counter 1
Unknown Signal
Standard Clock
Figure 3-3: Period measurement
Implementing this measurement needs two counters. One for the up
cycle period and another for the down cycle period. These added
together gives the total period. The duty cycle can also be calculated by
the up period being divided by the total period. Connect the unknown
signal to each counter's Gate.
Apply a standard clock pulse to each counter. Counter 0 counts the up
cycle. Counter 1 counts the down cycle. In PCI-1780, wiring is simple.
Only connect the unknown signal to counter 0, and use the register to
select the gate source. Counter 0 select the "Gate N", counter 1 select
the "Gate N-1".
Apply the standard clock to both counters by clock source select register.
It can change the clock for different measurement range. Counter 0 set
as "Mode O" and gate polarity is positive. Counter 1 set as "Mode O"
and gate polarity is negative.
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