User manual

MIC-3392 Rev.2 User Manual 62
C.1 Features
! Drone Mode
! Hot-Swap: Hot insertion and removal control
! CompactPCI Backplane: CompactPCI slot Addressing
! LPC Bus: Provide LPC Bus access
! Watchdog
! Debug Message: Boot time POST message
C.2 CPLD I/O Registers
The Advantech MIC-3392 CPLD communicates with four main I/O spaces. The LPC
(low pin count) Unit is used to interconnect the Intel ICH7M LPC signals. The Debug
Port Unit is used to decode POST codes. The Hot-Swap Out-Of-Service LED Control
Unit is used to control the blue LED during Hot-Insert and Hot-Remove. The Drone
Mode Unit is used to disable the cPCI bridge. The other signals in the Miscellaneous
Unit are for interfacing with corresponding I/O interface signals.
C.2.1 Debug Message
C.2.2 Watchdog Register
Table C.1: LPC I/O registers address
LPC Address I/O Type Description
0x 80h R Debug Message
0x 443h W Watchdog Register (enable)
0x 444h R Watchdog Register (disable)
0x 445h R CPLD version
0x 447h R Geography Address (GA)
Table C.2: Debug_Code [7:0] (LPC I/O address: 80H)
Bits Name Default
State
Valid
State
Read Only Function
7 ~ 0 Debug
code
xxh 0 ~ FFh Show debug code from Port 80h. Bit 7 (MSB) … 0
(LSB) is mapped to LED7…0
Table C.3: Watchdog [7:0] (LPC I/O address: 443H)
Bits Name Default
State
Valid
State
Write Only Function
7 ~ 0 Watchdog xxh 1 ~ FFh Any non-zero value in I/O port 443h enables the
watchdog function. The watchdog reset time is 1 ~
255 seconds (1 second per step).