User manual

9 MIC-3392 Rev.2 User Manual
Chapter 1 Hardware Configuration
1.2.23 HPET and IO/APIC
The MIC-3392's built-in south bridge, the ICH7, provides features to support High
Precision Event Timer (HPET) registers and I/O Advanced Programmable Interrupt
Controller (APIC). The ICH7 timer registers are memory-mapped in a non-indexed
scheme. The choice of address range will be selected by configuration bits in the
HPET. The ICH7 incorporates an APIC that can be used in either a uni-processor or
multi-processor system, like the standard ISA-compatible PIC used in a uni-proces-
sor system.
1.3 Functional Block Diagram
Figure 1.1 MIC-3392 Rev.2 functional block diagram