User Manual MIC-3392 Rev.
Copyright The documentation and the software included with this product are copyright 2008 by Advantech Co., Ltd. All rights are reserved. Advantech Co., Ltd. reserves the right to make improvements in the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated or transmitted in any form or by any means without the prior written permission of Advantech Co., Ltd. Information provided in this manual is intended to be accurate and reliable.
Declaration of Conformity CE This product has passed the CE test for environmental specifications when shielded cables are used for external wiring. We recommend the use of shielded cables. This kind of cable is available from Advantech. Please contact your local supplier for ordering information. FCC Class A Note: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules.
Warnings, Cautions and Notes Warning! Warnings indicate conditions, which if not observed, can cause personal injury! Caution! Cautions are included to help you avoid damaging hardware or losing data. e.g. There is a danger of a new battery exploding if it is incorrectly installed. Do not attempt to recharge, force open, or heat the battery. Replace the battery only with the same or equivalent type recommended by the manufacturer. Discard used batteries according to the manufacturer's instructions.
Safety Instructions 1. 2. 3. Read these safety instructions carefully. Keep this User Manual for later reference. Disconnect this equipment from any AC outlet before cleaning. Use a damp cloth. Do not use liquid or spray detergents for cleaning. 4. For plug-in equipment, the power outlet socket must be located near the equipment and must be easily accessible. 5. Keep this equipment away from humidity. 6. Put this equipment on a reliable surface during installation.
Safety Precaution - Static Electricity Follow these simple precautions to protect yourself from harm and the products from damage. ! To avoid electrical shock, always disconnect the power from your PC chassis before you work on it. Don't touch any components on the CPU card or other cards while the PC is on. ! Take anti-static precautions before making any configuration changes.
Contents Chapter 1 Hardware Configuration......................1 1.1 Introduction ............................................................................................... 2 Table 1.1: MIC-3392 Variants...................................................... 2 Specifications ............................................................................................ 3 1.2.1 CompactPCI Bus Interface ........................................................... 3 1.2.2 CPU ..............................
1.8 1.9 1.5.3 USB Connector (CN11/12 and Rear I/O).................................... 15 1.5.4 CompactFlash Socket (CN10) .................................................... 15 1.5.5 SATA daughter board connector (CN4) (Single PMC only)........ 15 1.5.6 Ethernet Configuration (RJ1/RJ2 or Rear I/O RJ1) .................... 16 1.5.7 PMC Connector (J21/22/23 for PMC1, J11/12/13 for PMC2)..... 16 1.5.8 SW1 (System reset and BMC reset button)................................ 16 Safety Precautions..............
2.9 Chapter Figure 2.20South Bridge Configuration ...................................... 38 Exit Option............................................................................................... 39 Figure 2.21Exit Option ................................................................ 39 2.9.1 Save Changes and Exit .............................................................. 39 2.9.2 Discard Changes and Exit .......................................................... 39 2.9.3 Load Defaults...........
A.5.1 Table A.11:RJ1 LAN1 Indicator .................................................. 57 Table A.12:RJ2 LAN2 Indicator .................................................. 57 M/D, PWR & IDE/Hot-swap LEDs .............................................. 58 Appendix B Programming the Watchdog Timer . 59 B.1 Watchdog Timer Programming Procedure ............................................. 60 Appendix C CPLD .................................................. 61 C.1 C.2 Features...........................
Chapter 1 1 Hardware Configuration This chapter describes how to configure MIC-3392 hardware.
1.1 Introduction The MIC-3392 is a high performance, power efficient CompactPCI single-board computer based on the Intel Core 2 Duo and Core Duo microprocessors. The MIC-3392 delivers breakthrough energy-efficient performance for CompactPCI platforms. The Intel Core 2 Duo provides enhanced energy-efficient performance to help equipment manufacturers optimally balance processing capabilities within power and space constraints.
1.2.1 CompactPCI Bus Interface 1.2.2 CPU The MIC-3392 supports the latest Intel Core Duo/Solo and Intel Core 2 Duo processor family with clock frequencies up to 2.16 GHz and a Front-Side Bus (FSB) up to 667 MHz. Intel Core Duo processors are validated with the Mobile Intel 945GME Express chipset.
improved storage speed and reliability. Features include an integrated 32-bit 3D graphics engine based on Intel Graphics Media Accelerator 950 (Intel GMA 950) architecture. The Mobile Intel 945GME chipset consists of the Intel 82945GME Graphics Memory Controller Hub (GMCH) and Intel I/O Controller Hub 7-M (ICH7-M). It delivers outstanding system performance through high bandwidth interfaces such as PCI Express, Serial ATA and Hi-Speed USB 2.0. MIC-3392 Rev.
The MIC-3392 has up to 2 GB of onboard non-ECC DDR2 memory. In addition, an SODIMM socket supports up to 2 GB of the following types of memory. Table 1.
1.2.7 Ethernet The MIC-3392 uses two Intel 82573E LAN chips to provide 10/100/1000Base-T Ethernet connectivity (LAN1 & LAN2) and one Intel 82562GT LAN chip to provide 10/ 100Base-T Ethernet connectivity (LAN3) via rear I/O. Optional settings for the source of each individual Gigabit Ethernet port can be selected in the BIOS menu. These are mutually exclusive and can be any one of: ! Front I/O (RJ-45) ! Rear I/O (Rear Transition Module) ! PICMG 2.16 1.2.
! Operating temperature: 0 ~ 55° C (32 ~ 122° F) Note! ! ! ! ! Storage Temperature: -20 ~ 60° C (-4 ~ 140° F). Humidity (Non-operating): 5 ~ 95% @ 60° C (non-condensing) Power Consumption: (Intel Core 2 Duo and 2 GB memory) +5 V @ 7.16 A; +3.3 V @ 3.17 A; +12 V @ 0.40 A Board size: 233.35 x 160 mm (6U size), 1-slot (4 TE) wide Weight: 0.8 kg (1.76 lb) Shock: 20 G (operating); 50 G (non-operating) Random vibration: 1.5 Grms (operating), 2.0 Grms (non-operating) 1.2.
1.2.17 I/O Connectivity Front panel I/O is provided by two RJ-45 Gigabit Ethernet ports, one RJ-45 COM port, two USB 2.0 ports, one VGA connector, and one PMC cutout. On the dual-PMC version only one RJ-45 Gigabit Ethernet Port and one RJ-45 COM port are available on the front panel due to the space taken by the second PMC cutout. Onboard I/O consists of one IDE channel to a Compact Flash socket and additionally on the single-PMC version of the MIC-3392, one SATA channel can be connected to a 2.5" SATA HDD.
The MIC-3392's built-in south bridge, the ICH7, provides features to support High Precision Event Timer (HPET) registers and I/O Advanced Programmable Interrupt Controller (APIC). The ICH7 timer registers are memory-mapped in a non-indexed scheme. The choice of address range will be selected by configuration bits in the HPET. The ICH7 incorporates an APIC that can be used in either a uni-processor or multi-processor system, like the standard ISA-compatible PIC used in a uni-processor system.
1.4 Jumpers and Switches Table 1.4 and table 1.5 list the jumper and switch functions. Figure 1.2 illustrates the jumper and switch locations. Read this section carefully before changing the jumper and switch settings on your MIC-3392 board. Table 1.4: MIC-3392 jumper descriptions Number Function JP1 Clear CMOS JP2 VGA Output Setting JP3 Backplane PCIx / PCI setting Table 1.
Chapter 1 Table 1.8: JP1 Clear CMOS Clear CMOS closed 1.4.3 Switch Settings Table 1.9: SW5-1 LAN for BMC LAN2 on LAN3 (reserved) off SW5-1 selects the LAN port that is used for Serial Over LAN (SoL) functionality. The 10/100 LAN3 port is routed to the rear I/O but is not currently implemented on standard Advantech Rear I/O modules. Table 1.10: SW5-2 SATA HDD channel setting (single PMC) Default On board on RTM off Table 1.
Table 1.12: SW5-3 & SW5-4: BMC, SIO & RTM COM2 selections SIO to BMC Off Off When COM2 is not used as a console interface, it is used to communicate BMC information via the onboard SIO COM2 or RTM COM2. SW5-3 and SW5-4 determine whether COM2 is routed via SIO COM2 or RIO COM2. Three modes are available. BMC to RTM COM2 is the default. Table 1.
Chapter 1 13 MIC-3392 Rev.2 User Manual Hardware Configuration Figure 1.2 MIC-3392 Rev.
1.5 Connector Definitions Onboard connectors link to external devices such as hard disk drives, keyboards or floppy drives. Table 1.11 lists the function of each connector and Figure 1.2 illustrates each connector location. Table 1.
1.5.2 Serial Ports (CN9 and Rear I/O) The MIC-3392 provides two serial ports. COM1 is available as an RS-232 interface via an RJ-45 connector on the front panel (CN9). An RJ-45 to DB-9 adaptor cable is provided in the MIC-3392 accessories to facilitate connectivity to external console or modem devices. Both the COM1 and COM2 ports are connected to the RIO-3310 series of rear I/O boards.
1.5.6 Ethernet Configuration (RJ1/RJ2 or Rear I/O RJ1) The MIC-3392 is equipped with two high performance, PCI-Express based, network interface controllers which provide fully compliant IEEE 802.3u 10/100/1000Base-TX Ethernet interfaces. Users can select front panel, rear I/O or PICMG 2.16 connectivity via the BIOS. Users can choose the LAN1 and LAN2 either via the front panel RJ-45 connectors (RJ1 and RJ2) or the RJ-45 connector (RJ1) on the rear I/O module.
Note! If your product comes with a processor in a soldered µFCBGA package, please add a different heat sink. You need to insert a heat pad between the processor and the heat sink. The heat pad is provided in the accessory bag. The heat pad should be positioned between the heat sink and the CPU. The heat pad is fragile, so please be careful during disassembly. If you are using a heat pad other than the one issued by Advantech, be aware that it may not absorb a sufficient amount of heat. Figure 1.
1.7.1 CPU & Heatsink Installation Steps The MIC-3392 contains electrostatically sensitive devices. Please discharge your clothing before touching the assembly. Do not touch components or connector pins. We recommend that you perform assembly at an anti-static workbench. 1. Check that the following components are close at hand: – 1 x CPU – Thermal paste – 1 x Heatsink – 4 x screws – 4 x springs 2. 3. Apply thermal paste to the top of the CPU die.
Fasten the heatsink to the base plate. Chapter 1 7. The battery model number is CR2032M1S8-LF, a 3 V, 210 mAH battery. Replacement batteries may be purchased from Advantech. When ordering the battery, please use the following part number: 1750129010 -- BATTERY 3V/210 mAh with WIRE ASS'YCR2032M1S8-LF 1.9 Software Support Windows XP, Windows 2003 and Fedora Linux 5 have been fully tested on the MIC3392. Please contact your local sales representative for details on support for other operating systems.
MIC-3392 Rev.
Chapter 2 2 AMI BIOS Setup This chapter describes how to configure the AMI BIOS.
2.1 Introduction The AMI BIOS has been customized and integrated into many industrial and embedded motherboards for over a decade. This section describes the BIOS which has been specifically adapted to the MIC-3392. With the AMI BIOS Setup program, you can modify BIOS settings and control the special features of the MIC-3392. The Setup program uses a number of menus for making changes and turning the special features on or off. This chapter describes the basic navigation of the MIC-3392 setup screens.
Turn on the computer and check for the “patch” code. If there is a number assigned to the patch code, it means that BIOS supports your CPU. If there is no number assigned to the patch code, please contact an Advantech application engineer to obtain an up-to-date patch code file. This will ensure that your CPU's system status is valid. After ensuring that you have a number assigned to the patch code, press and you will immediately be allowed to enter Setup. Chapter 2 2.
2.3 Main Setup When you first enter the BIOS Setup Utility, you will enter the Main setup screen. You can always return to the Main setup screen by selecting the Main tab. Two main setup options are described in this section. The main BIOS setup screen is shown below. Figure 2.3 Main setup screen The main BIOS setup menu screen has two main frames. The left frame displays all the options that can be configured. “Grayed-out” options cannot be configured, whilst options in blue can.
Select the Advanced tab from the MIC-3392 setup screen to enter the Advanced BIOS Setup screen. You can select any of the items in the left frame of the screen, such as CPU Configuration, to go to the sub menu for that item. You can display an Advanced BIOS Setup option by highlighting it using the keys. All Advanced BIOS Setup options are described in this section. The Advanced BIOS Setup screen is shown below. The sub menus are described on the following pages. Chapter 2 2.
2.4.1 CPU Configuration Figure 2.5 CPU Configuration 2.4.1.1 Max CPUID Value Limit It is recommended that you leave this value at the default setting of Disabled. Please note that this BIOS feature currently only allows the Intel Pentium 4 processor with Hyper-Threading Technology to work with operating systems that do not support extra CPUID information provided by the processor. 2.4.1.2 Core Multi-Processing This item specifies the CPU to perform multi-processing.
Chapter 2 2.4.2 LAN & SMbus Configuration AMI BIOS Setup Figure 2.6 LAN & SMBus Configuration 2.4.2.1 Select LAN1/LAN2 mode The item allows you to choose where the LAN1 and LAN2 Gigabit Ethernet ports are connected. There are 3 options: Front (Default), PICMG 2.16 and Rear I/O board. 2.4.2.2 Select SMBus mode This setting indicates whether remote management is performed by IPMI-enabled CMM such as the Advantech MIC-3927. The default setting is “BMC” which corresponds to IPMI-enabled CMM. Table 2.
2.4.3 IDE Configuration Figure 2.7 IDE Configuration 2.4.3.1 ATA/IDE Configuration Three options are available: Disabled, Compatible or Enhanced. “Disabled” means that all IDE resources are disabled. “Compatible” enables up to 2 IDE channels for OSs requiring legacy IDE operation (default setting) and “Enhanced” enables all SATA and PATA resources. 2.4.3.2 Legacy IDE Channels Four options are available: SATA Only, Reserved, “SATA Pri, PATA Sec” or PATA Only. 2.4.3.
Chapter 2 2.4.4 Floppy Configuration AMI BIOS Setup ! ! Figure 2.8 Floppy Configuration Floppy A: Select the type of floppy drive connected to the system. Floppy B: Select the type of floppy drive connected to the system. 29 MIC-3392 Rev.
2.4.5 Super I/O Configuration ! ! ! ! Figure 2.9 Super I/O Configuration Onboard Floppy Controller: Used to enable or disable the floppy controller Serial Port1 Address: Used to select Serial Port1 base addresses Serial Port2 Address: Used to select Serial Port2 base addresses Parallel Port Address: Used to select Parallel Port base addresses – Parallel Port Mode: Used to select Parallel Port mode – Parallel Port IRQ: Used to select Parallel Port IRQ MIC-3392 Rev.
Chapter 2 2.4.6 ACPI Setting AMI BIOS Setup Figure 2.10 ACPI Setting The options for “ACPI Aware O/S” are “Yes” or “No” in order to enable or disable ACPI support for the operating system. The default is “Yes”. 2.4.7 Hardware Health Configuration Figure 2.11 Hardware Health Configuration 31 MIC-3392 Rev.
2.4.8 Console Redirection Configuration Figure 2.12 Configure Remote Access types and parameters 2.4.8.1 Remote Access You can disable or enable the BIOS remote access feature here. The optimal and fail-safe default setting is “Enabled”. 2.4.8.2 Serial Port Number Select the serial port you want to use for console redirection. You can set the value for this option to either ICH COM1 or ICH COM2. The optimal and fail-safe default setting is ICH COM1. 2.4.8.
Chapter 2 2.4.9 APM Configuration AMI BIOS Setup Figure 2.13 APM configuration APM allows the BIOS to control the system’s power management without the knowledge of the operating system. The default setting for “Power Management/APM” is “Enabled”. Note! ! ! ! ! ! ! ! ! ! ! When both ACPI and APM modes are enabled at the same on the BIOS setup, the former power management control will take precedence if the OS supports ACPI mode. Video Power Down Mode: Used to power down the video in “Suspend” mode.
2.5 PCI/PNP Setup Select the PCI/PnP tab from the MIC-3392 setup screen to enter the Plug and Play BIOS Setup screen. You can display a Plug and Play BIOS Setup option by highlighting it using the keys. All Plug and Play BIOS Setup options are described in this section. The Plug and Play BIOS Setup screen is shown below. Figure 2.14 PCI/PNP Setup 2.5.1 Clear NVRAM Set this value to force the BIOS to clear the Non-Volatile Random Access Memory (NVRAM).
Chapter 2 2.6 Boot Setup AMI BIOS Setup Figure 2.15 Boot Setup 2.6.1 Boot Settings Configuration ! Figure 2.16 Boot Settings Configuration Quick Boot: Allows the BIOS to skip certain tests while booting. This will decrease the time needed to boot the system. 35 MIC-3392 Rev.
! ! ! Boot From LAN1/2/3 Support: Used to set the system bootable from LAN1/2/ 3. The default setting is on “Disabled“. Wait For 'F1' If Error: Wait for the F1 key to be pressed if an error occurs. Hit 'DEL' Message Display: Displays “Press DEL to run Setup” in POST. 2.7 Security Setup Figure 2.17 Password Configuration Select Security Setup from the MIC-3392 Setup main BIOS setup menu. All Security Setup options, such as password protection and virus protection, are described in this section.
Chapter 2 2.8 Advanced Chipset Settings AMI BIOS Setup Figure 2.18 Advanced Chipset Setting 2.8.1 North Bridge Chipset Configuration Figure 2.19 North Bridge Configuration 37 MIC-3392 Rev.
! ! ! ! ! ! ! ! ! ! DRAM Frequency: Available settings are “Auto” (default), “400MHz”, “533MHz”, and “667MHz”. Configure DRAM timing by SPD: Available settings are “Enable” (default) and “Disabled”. Memory Hole: Available settings are “Disabled” (default) and “15MB-16MB”. Boots Graphic Adapter Priority: Select which graphics controller to use as the primary boot device. Internal Graphics Mode Select: Available settings are “Enabled, 8MB” (default), “Enabled, 1MB”, and “Disabled”.
Chapter 2 2.9 Exit Option AMI BIOS Setup Figure 2.21 Exit Option 2.9.1 Save Changes and Exit When you have completed the system configuration changes, follow these steps: 1. Select Exit Saving Changes from the Exit menu and press . The following messages appear on the screen: Save Configuration Changes and Exit Now? [Ok] [Cancel] 2. Select Ok to save changes and exit. 2.9.2 Discard Changes and Exit Follow these steps to quit Setup without making any permanent changes to the system configuration.
MIC-3392 Rev.
Chapter 3 3 IPMI This chapter describes IPMI configuration.
3.1 Introduction The MIC-3392 fully supports the IPMI 2.0 interface and the PICMG 2.9 R1.0 specification. The Renesas H8S/2167 has been implemented as the IPMI controller / Baseboard Management Controller (BMC) to run firmware and collect information. The MIC-3392 IPMI firmware is sourced from Avocent, a provider of proven and tested IPMI implementations in a wide range of mission-critical applications. The BMC's key features and functions are listed below. ! Compliant with IPMI specification, revision 2.
Table 3.1: Supported IPMI commands IPMI Device Global Commands Cmd Mandatory / Optional Get Device Id App 0x01 M Cold Reset App 0x02 O Get Self Test Results App 0x04 M Manufacturing Test On App 0x05 O Set ACPI Power State App 0x06 O Get ACPI Power State App 0x07 O Get Device GUID App 0x08 O 3.3.2 BMC Device and Messaging Interfaces The BMC messaging interfaces comply with the Intelligent Platform Management Interface Specification, Version 2.0.
Table 3.
Table 3.
3.3.7 SEL Device Commands Table 3.
Sensor data record (SDR) repository will be stored in BMC's flash memory and cannot be changed. Note! IPMI UNC = Upper Non-Critical. UC = Upper Critical UNR = Upper Non-Recoverable LNC = Lower Non-Critical LC = Lower Critical LNR = Lower Non-Recoverable Table 3.
Note! A chassis intruder sensor is not used on the MIC-3392 platform. Power failure sensor type "C0h" indicates a power failure event. Apart from the following list of sensors, other sensors should be reinitialized when the system is powered on or reset. - VCC - SEL Fullness - System PWR monitor - Watchdog Table 3.13: Threshold values of sensors Sensor Name Sensor Number UNR UC Nominal UNC Reading LNC LC LNR W83627DHG Vcore 0x10 N/A 1.44 N/A N/A 0.8 N/A 1.2 W83627DHG +1.5 V 0x11 N/A 1.
Set LAN Configuration Parameters Transport 0x01 M Get LAN Configuration Parameters Transport 0x02 M 3.3.12 Serial/Modem Device Commands Chapter 3 Table 3.15: LAN Device Commands Table 3.16: Serial/Modem Device Commands NetFn Cmd Mandatory / Optional Set Serial/Modem Configuration Parameters Transport 0x10 M Get Serial/Modem Configuration Parameters Transport 0x11 M Set Serial/Modem Mux Transport 0x12 M 3.
MIC-3392 Rev.
Appendix A A Pin Assignments This appendix describes pin assignments.
A.1 J1 Connector Table A.1: J1 CompactPCI I/O Row A Row B Row C Row D Row E Row F 1 +5 V -12 V TRST# (NC) +12 V +5 V GND 2 TCK (NC) +5 V TMS (NC) TDO TDI (NC) GND 3 INTA# INTB# INTC# +5 V INTD# GND 4 IPMB_PWR HEALTHY# V(I/O) INTP INTS GND 5 NC NC PCI_RST# GND GNT0# GND 6 REQ0# PCI_PRESENT +3.3 V CLK0 AD31 GND 7 AD30 AD29 AD28 GND AD27 GND 8 AD26 GND V(I/O) AD25 AD24 GND 9 C/BE3# IDSEL AD23 GND AD22 GND 10 AD21 GND +3.
Table A.
A.3 J3 Connector Table A.3: J3 CompactPCI I/O (LPT, FDD, Parallel IDE, 2.
Table A.
Table A.6: CN9 COM1 (RJ45) Connector 1 DCD# 6 DSR# 2 SIN 7 RTS# 3 SOUT 8 CTS# 4 DTR# 5 GND Table A.7: CN11 & CN12 USB port 1 & port 2 1 +5 V (fused) 1 +5 V (fused) 2 USBD0- 2 USBD1- 3 USBD0+ 3 USBD1+ 4 GND 4 GND Table A.
7 GND 8 GND 9 GND 10 SATA_RX0N 11 GND 12 SATA_RX0P 13 GND 14 GND 15 RSV (+3.3 V/+12 V) 16 +5 V 17 RSV (+3.3 V/+12 V) 18 +5 V 19 RSV (+3.3 V/+12 V) 20 +5 V Table A.10: RJ1 LAN1 Connector 1 LANMDI_0+ 5 LANMDI_2- 2 LANMDI_0- 6 LANMDI_1- 3 LANMDI_1+ 7 LANMDI_3+ 4 LANMDI_2+ 8 LANMDI_3- Table A.11: RJ1 LAN1 Indicator Table A.12: RJ2 LAN2 Indicator 57 MIC-3392 Rev.2 User Manual Appendix A Pin Assignments Table A.
A.5.1 M/D, PWR & IDE/Hot-swap LEDs Name Description 1 M/D (Green) Indicates Master or Drone mode status 2 PWR (Green) Indicates the power status 3 HDD / Hot-swap (Yellow/Blue) Indicates IDE activity when yellow, or that the board is ready to be hot-swapped when blue. 4 BMC (Yellow) MIC-3392 Rev.
Appendix B B Programming the Watchdog Timer This appendix describes how to program the watchdog timer.
B.1 Watchdog Timer Programming Procedure To program the watchdog timer, you must execute a program that writes a value to I/ O port address 443/444 (hex) for Enable/Disable. This output value represents time interval. The value range is from 01 (hex) to FF (hex), and the related time interval is 1 to 255 seconds. Data Time Interval 01 1 sec. 02 2 sec. 03 3 sec. 04 4 sec. … … 3F 63 sec.
Appendix C C CPLD This appendix describes CPLD configuration.
C.1 Features ! ! ! ! ! ! Drone Mode Hot-Swap: Hot insertion and removal control CompactPCI Backplane: CompactPCI slot Addressing LPC Bus: Provide LPC Bus access Watchdog Debug Message: Boot time POST message C.2 CPLD I/O Registers The Advantech MIC-3392 CPLD communicates with four main I/O spaces. The LPC (low pin count) Unit is used to interconnect the Intel ICH7M LPC signals. The Debug Port Unit is used to decode POST codes.
Table C.4: Watchdog [7:0] (LPC I/O address: 444H) Bits Name Default Valid State State 7~0 Watchdog xxh xxh Read Only Function Reading I/O port 444h will disable the watchdog. The return value is meaningless. Table C.5: Version [7:0] (LPC I/O address: 445H) Bits Name Default Valid State State Read Only Function 7~4 CPLD Ver- xxh sion (units) xxh Read I/O port 445h to get the CPLD version in BCD. E.g, for v1.
www.advantech.com Please verify specifications before quoting. This guide is intended for reference purposes only. All product specifications are subject to change without notice. No part of this publication may be reproduced in any form or by any means, electronic, photocopying, recording or otherwise, without prior written permission of the publisher. All brand and product names are trademarks or registered trademarks of their respective companies. © Advantech Co., Ltd.
