User manual

MIC-3392MIL User Manual x
4.3.11 Serial/Modem Device Commands .............................................. 58
Table 4.15:Serial modem device commands ............................. 58
4.4 BMC Reset.............................................................................................. 59
Appendix A Pin Assignments............................... 61
A.1 J1 Connector........................................................................................... 62
Table A.1: J1 CompactPCI I/O .................................................. 62
A.2 J2 Connector........................................................................................... 63
Table A.2: J2 CompactPCI I/O .................................................. 63
A.3 J3 Connector........................................................................................... 64
Table A.3: J3 CompactPCI I/O (LAN1/LAN2, 2.16) ................... 64
A.4 J4 Connector........................................................................................... 65
Table A.4: J4 CompactPCI I/O (Audio, LAN3/LAN4, IDE, SATA,
USB, and DVI).......................................................... 65
A.5 J5 Connector........................................................................................... 66
Table A.5: J5 CompactPCI I/O (USB, PS2, COM, FDD, DVI, and
VGA)......................................................................... 66
A.6 Other Connector ..................................................................................... 67
Table A.6: CN4 SATA daughter board connector...................... 67
Appendix B Pin Assignments............................... 69
B.1 M/D, PWR, BMC HB, and IDE/Hot-swap LEDs ...................................... 70
Appendix C Programming the Watchdog Timer .71
C.1 Watchdog Timer Programming Procedure ............................................. 72
Appendix D CPLD .................................................. 73
D.1 Features.................................................................................................. 74
D.2 CPLD I/O Registers ................................................................................ 74
Table D.1: LPC I/O registers address ........................................ 74
D.2.1 Debug Message.......................................................................... 74
Table D.2: Debug_Code [7:0] (LPC I/O address: 80H).............. 74
D.2.2 Watchdog Register ..................................................................... 74
Table D.3: Watchdog [7:0] (LPC I/O address: 443H)................. 74
D.2.3 Watchdog Disable Register ........................................................ 75
Table D.4: Watchdog [7:0] (LPC I/O address: 444H)................. 75
Table D.5: Version [7:0] (LPC I/O address: 445H)..................... 75
D.2.4 Geography Address (GA) ........................................................... 75
Table D.6: GA [7:0] (LPC I/O address: 447H)............................ 75
Appendix E Glossary............................................. 77