User Manual MIC-3392MIL 6U CompactPCI® Intel® Core™ 2 Duo Processor Based Board with Dual PCIe GbE/DDR2/SATA
Copyright The documentation and the software included with this product are copyrighted 2008 by Advantech Co., Ltd. All rights are reserved. Advantech Co., Ltd. reserves the right to make improvements in the products described in this manual at any time without notice. No part of this manual may be reproduced, copied, translated or transmitted in any form or by any means without the prior written permission of Advantech Co., Ltd. Information provided in this manual is intended to be accurate and reliable.
Declaration of Conformity CE This product has passed the CE test for environmental specifications when shielded cables are used for external wiring. We recommend the use of shielded cables. FCC Class A Note: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment.
Warnings, Cautions and Notes Warning! Warnings indicate conditions, which if not observed, can cause personal injury! Caution! Cautions are included to help you avoid damaging hardware or losing data. e.g. There is a danger of a new battery exploding if it is incorrectly installed. Do not attempt to recharge, force open, or heat the battery. Replace the battery only with the same or equivalent type recommended by the manufacturer. Discard used batteries according to the manufacturer's instructions.
Safety Instructions 1. 2. 3. Read these safety instructions carefully. Keep this User Manual for later reference. Disconnect this equipment from any AC outlet before cleaning. Use a damp cloth. Do not use liquid or spray detergents for cleaning. 4. For plug-in equipment, the power outlet socket must be located near the equipment and must be easily accessible. 5. Keep this equipment away from humidity. 6. Put this equipment on a reliable surface during installation.
Safety Precaution - Static Electricity Follow these simple precautions to protect yourself from harm and the products from damage. ! To avoid electrical shock, always disconnect the power from your PC chassis before you work on it. Don't touch any components on the CPU card or other cards while the PC is on. ! Take anti-static precautions before making any configuration changes.
Contents Chapter 1 Hardware Configuration......................1 1.1 Introduction ............................................................................................... 2 Table 1.1: MIC-3392MIL Variants................................................ 2 Specifications ............................................................................................ 3 1.2.1 CompactPCI Bus Interface ........................................................... 3 1.2.2 CPU .................................
1.7.1 Chapter 1.8 Wedge Locks Removal............................................................... 14 Figure 1.3 Remove the M2 x .40 screws (x4)............................ 14 Figure 1.4 Remove the wedge locks from the conduction-cooled plate.......................................................................... 15 1.7.2 PCB Guide Base Removal ......................................................... 15 Figure 1.5 Remove the M2 screws for the PCB guide bases.... 15 Figure 1.
2.8 2.9 Chapter 3 Pre-heat for the MIC-3392MILC ........41 3.1 Introduction ............................................................................................. 42 Figure 3.1 Pre-heat thermal sensor (DS1631AU) location ........ 42 Figure 3.2 Pin definitions of CN13 ............................................. 43 Pre-heat Firmware Operation.................................................................. 43 3.2.1 Standard Pre-heat Mode.........................................................
4.4 4.3.11 Serial/Modem Device Commands .............................................. 58 Table 4.15: Serial modem device commands ............................. 58 BMC Reset.............................................................................................. 59 Appendix A Pin Assignments............................... 61 A.1 J1 Connector........................................................................................... 62 Table A.1: J1 CompactPCI I/O ...................................
Chapter 1 1 Hardware Configuration This chapter describes how to configure MIC-3392MIL hardware.
1.1 Introduction The MIC-3392MIL is a high performance, power efficient, CompactPCI PICMG2.16 compliant single-board computer based on the Intel Core2 Duo ULV or Core Duo LV microprocessor. Designed to meet a wide range of environmental requirements from ruggedized applications, the MIC-3392MIL delivers breakthrough energy-efficient performance for CompactPCI platforms.
1.2.1 CompactPCI Bus Interface 1.2.2 CPU The MIC-3392MIL supports the 65nm-technology Intel Core Duo LV and Intel Core 2 Duo ULV processor family with clock frequencies up to 1.66GHz GHz and a FrontSide Bus (FSB) up to 667 MHz. These processors are validated with the Mobile Intel 945GME Express chipset.
1.2.5 Memory The MIC-3392MIL has 2 GB of on-board non-ECC DDR2 SDRAM. It also has a SODIMM socket that can accommodate an additional 2 GB of memory. However, with Intel 945GME chipset the OS may report a lower amount of total available memory such as 3 GB. The memory range unavailable to the OS will still be utilized by subsystems such as I/O, PCI-Express, and Integrated Graphics. The following table shows a list of SODIMM modules with Advantech P-trade part numbers that have been tested on the MIC-3392MIL.
Six USB 2.0/1.1 compliant ports with fuse protection are provided. Two of them are routed to front panel connectors on the MIC-3392MILS model. The other four are routed to the RTM through the J4 and J5 connectors. 1.2.10 LEDs 1.2.11 Watchdog Timer An onboard watchdog timer provides system reset capabilities via software control. The programmable time interval is from 1 to 255 seconds. 1.2.12 Optional Rear I/O Modules The RIO-3392MIL is the optional RTM (also known as rear I/O module) for the MIC3392MIL.
1.2.14 Compact Mechanical Design The MIC-3392MILS model has a specially designed copper heat sink for the processor to enable fanless operation. However, forced air cooling in the chassis is still needed for operational stability and reliability. The MIC-3392MILC model uses a conduction-cooled design that complies with ANSI/VITA30.1-2002 specifications. It uses a pair of wedge locks and a single-piece of CNC-milled aluminum alloy plate that conforms to the major IC packages on the primary side of the PCB.
One Hardware Monitor (W83627HG) is available to monitor critical hardware parameters. It is attached to the BMC to monitor the CPU temperature and core voltage information. 1.2.18 Super I/O 1.2.19 RTC and Battery The RTC module keeps the date and time. On the MIC-3392MILS model the RTC circuitry is connected to battery sources (CR2032M1S8-LF, 3V, 210mAH), one located on the board and the other on the RIO-3392MIL RTM.
1.3 Functional Block Diagram Figure 1.1 MIC-3392MIL functional block diagram 1.4 Jumpers and Switches Table 1.4 and table 1.5 list the jumper and switch functions. Figure 1.2 illustrates the jumper and switch locations. Read this section carefully before changing the jumper and switch settings on your MIC-3392MIL board.
Chapter 1 Table 1.4: MIC-3392MIL jumper descriptions Number Function JP5 VGA Output Setting JP6 Clear CMOS JP7 CompactFlash Master/Slave Mode Selection Number Function SW1 PCI Bridge Master/Drone Mode Selection SW2 BMC Reset/Platform Reset (available on the Front Panel only) SW3 SATA Port 1 Channel Setting SW4 BMC Firmware Programmable/Console Setting 1.4.1 Jumper Settings Table 1.6: JP5 VGA Output Setting Default Front Panel 1-2 1 2 3 RTM 2-3 1 2 3 Table 1.
2. 3. 4. Close jumper JP6 (1-2) for about 3 seconds. Set jumper JP6 as Normal. Turn on the system. The BIOS is reset to its default setting. Table 1.8: JP6 Clear CMOS Default Normal Open 1 2 Clear CMOS Closed 1 2 1.4.3 Switch Settings Table 1.9: SW1 PCI Bridge Master/Drone Mode Selection Master Default On On Drone Off Off Note! Key: represents the switch. Table 1.
Chapter 1 Table 1.11: SW3 SATA Port 1 Channel Setting On-Board Default On RTM SW3 selects the routing of SATA port 1 channel to either the onboard HDD socket or the RTM. Table 1.12: SW4 BMC Firmware Programming/Console Setting BMC to Console Default Off On Off On Off Off BMC Firmware Programmable On Off On Off On On COM3 on the RIO-3392MIL RTM is connected to the BMC. The BMC firmware can be re-programmed by setting SW4 to “BMC Firmware Programmable” mode.
1.5 Connector Definitions Table 1.13 lists the function of each connector and Figure 1.2 illustrates connector locations. Table 1.13: MIC-3392MIL connector descriptions Number Function VCN1 VGA connector CN12 USB port 1 CN11 USB port 2 BH1 CMOS battery CN10 CompactFlash socket CN4 SATA daughter board connector CN13 Pre-heat 10W heater pad power connector SODIMM1 SODIMM socket J1/J2 Primary CompactPCI bus J3/J4/J5 Rear I/O transition Figure 1.
1.5.2 USB Connectors (CN11/12) The MIC-3392MIL provides up to six Universal Serial Bus (USB) 2.0 channels. Two front panel USB ports, CN11 and CN12, are available on the MIC-3392MILS model. Four other USB channels are routed to rear I/O via the J4 and J5 connectors. The MIC-3392MIL USB interface complies with USB specification R2.0 and is fuse protected (5 V @ 1.1 A). The USB interface can be disabled in the system BIOS setup. The USB controller default is set to “Enabled”. 1.5.
1.6 Safety Precautions Follow these simple precautions to protect yourself from harm and the products from damage. ! To avoid electric shock, always disconnect the power from your CompactPCI chassis before you work on it. Don’t touch any components on the CPU board or other boards while the CompactPCI chassis is powered. ! Disconnect power before making any configuration changes. The sudden rush of power as you connect a jumper or install a board may damage sensitive electronic components.
Chapter 1 1.7.2 PCB Guide Base Removal Each of the two PCB guide bases is fastened to the conduction-cooled plate by three M2 screws, which can be accessed from the primary side of the board. Figure 1.5 Remove the M2 screws for the PCB guide bases 15 MIC-3392MIL User Manual Hardware Configuration Figure 1.
Figure 1.6 Remove the PCB guide bases from the conduction-cooled plate 1.7.3 Conduction-Cooled Plate Removal To gain access to the CF socket (CN10), the conduction-cooled plate must be removed. There are sixteen M2.5 screws to be removed before the plate can be retrieved. Caution must be taken when taking the plate away from the PCB because the heater pad’s power input wire is still connected to connector CN13. Figure 1.7 Remove the M2.
Chapter 1 1.7.4 CF Card Insertion After the conduction-cooled plate is removed, a CF card (Type-1) can be installed in CN10 as shown below. Figure 1.9 Insert the CF card in CN10 17 MIC-3392MIL User Manual Hardware Configuration Figure 1.
1.7.5 Reassembling the Conduction-cooled Assembly After the CF card is installed, the conduction-cooled plate should be re-installed on the PCB. First reattach the heater pad’s power input connector to CN13, then reattach the two PCB guide bases. Please note that the PCB guide base must be installed in a specific direction; the “L” step must face the PCB as shown in the following figures. The conduction-cooled plate requires sixteen M2.5 screws, and each PCB guide base needs three M2 screws.
Figure 1.13 M2 x.40 screw locations Note! To achieve the proper clamping and retention forces on the cold-plates of a conduction-cooled chassis (VITA30.1 compliant), the recommended torque for the hexagon socket head cap screw on the wedge lock is 8.2 kgf·cm. 19 MIC-3392MIL User Manual Hardware Configuration Figure 1.
1.8 Software Support Windows XP, Windows 2003, Windows Vista and Fedora Core 5 have been fully tested on the MIC-3392MIL. Please contact your local sales representative for details on support for other operating systems.
Chapter 2 2 AMI BIOS Setup This chapter describes how to configure the AMI BIOS.
2.1 Introduction The AMI BIOS has been customized and integrated into many industrial and embedded motherboards for over a decade. This section describes the BIOS which has been specifically adapted to the MIC-3392MIL. With the AMI BIOS Setup program, you can modify BIOS settings and control the special features of the MIC-3392MIL. The Setup program uses a number of menus for making changes and turning the special features on or off.
Turn on the computer, and there should be a “patch code” that shows the BIOS details including date, version number, etc. If there is no number assigned to the patch code, please contact an Advantech application engineer to obtain an up-todate patch code file. This will ensure that the CPU’s system status is valid. After ensuring that you have a number assigned to the patch code, press and you will immediately be allowed to enter Setup. Chapter 2 2.2 Entering Setup AMI BIOS Setup Figure 2.
2.3 Main Setup When you first enter the BIOS Setup Utility, you will enter the Main setup screen. You can always return to the Main setup screen by selecting the Main tab. Two main setup options are described in this section. The main BIOS setup screen is shown below. Figure 2.3 Main setup screen The main BIOS setup menu screen has two main frames. The left frame displays all the options that can be configured. “Grayed-out” options cannot be configured whilst options in blue can.
Select the Advanced tab from the MIC-3392MIL setup screen to enter the Advanced BIOS Setup screen. You can select any of the items in the left frame of the screen, such as CPU Configuration, to go to the sub menu for that item. You can display an Advanced BIOS Setup option by highlighting it using the keys. All Advanced BIOS Setup options are described in this section. The Advanced BIOS Setup screen is shown below. The sub menus are described on the following pages. Chapter 2 2.
2.4.1.1 Max CPUID Value Limit It is recommended that you leave this value at the default setting of Disabled. 2.4.1.2 Core Multi-Processing This item specifies the CPU to perform multi-processing. The default setting for this item is set to “Enabled”. 2.4.1.3 CPU TM Function This item specifies the Thermal Monitor Feature. If set to “Enabled”, the BIOS enables the CPU’s built-in automatic thermal throttling when the die temperature approaches the processor’s temperature limit.
Figure 2.7 Floppy configuration Floppy A: Select the type of floppy drive connected to the system. 27 MIC-3392MIL User Manual AMI BIOS Setup ! Chapter 2 2.4.
2.4.4 Super I/O Configuration ! ! ! ! ! ! ! ! Figure 2.8 Super I/O configuration Onboard Floppy Controller: Used to enable or disable the on-board floppy controller (in the Super I/O). Floppy Drive Swap: Set this option to “Enabled” to specify that floppy drives A: and B: are swapped. The setting can be “Enabled” or “Disabled”. Serial Port1 Address: Used to select Serial Port1 base addresses. Serial Port2 Address: Used to select Serial Port2 base addresses.
! Figure 2.9 Hardware health configuration H/W Health Function: Used to enable or disable hardware health event monitoring such as system (ambient) temperature, CPU temperature, CPU Vcore, system 3.3V, 5V, 12V and -12V input voltages, and the on-board 3V CMOS battery voltage level. Show VBAT Voltage: Used to enable or disable the reading of the on-board 3V battery voltage level. Note! Set Show VBAT Voltage to “Disabled” when no CMOS battery is installed on the board.
2.4.6 ACPI Setting Figure 2.10 ACPI setting Two types of power management technologies are supported by the MIC-3392MIL: ACPI and APM. ACPI is the newer of the two technologies and puts power management in the hands of the operating system. APM is controlled by the BIOS. Only one power management interface (ACPI or APM) can be in control of the system at a time. The options for “ACPI Aware O/S” are “Yes” or “No,” which either enable or disable ACPI support for the operating system.
Chapter 2 2.4.7 APM Configuration Note! ! ! ! When both ACPI and APM modes are enabled at the same time on the BIOS setup, the former power management control will take precedence if the OS supports ACPI mode. In the event that the OS is unaware of ACPI, APM will take control. Hard Disk Power Down Mode: Used to power down the hard disk drive in “Suspend” mode. The default setting for this feature is “Disabled”. Throttle Slow Clock Ratio: Used to select the duty cycle of the CPU in throttle mode.
2.4.8 Console Redirection Configuration Figure 2.12 Console re-direction configuration 2.4.8.1 Remote Access You can disable or enable the BIOS remote access feature here. The default setting is “Enabled”. 2.4.8.2 Serial Port Number Select the serial port you want to use for console redirection. You can set the value for this option to either SIO COM1 or COM2. The default setting is SIO COM1. 2.4.8.3 Serial Port Mode Select the baud rate you want the serial port to use for console redirection.
Select the PCI/PnP tab from the MIC-3392MIL setup screen to enter the Plug and Play BIOS Setup screen. You can display a Plug and Play BIOS Setup option by highlighting it using the keys. All Plug and Play BIOS Setup options are described in this section. The Plug and Play BIOS Setup screen is shown below. Chapter 2 2.5 PCI/PnP Setup AMI BIOS Setup Figure 2.13 PCI/PnP setup 2.5.1 Clear NVRAM Set this value to force the BIOS to clear the Non-Volatile Random Access Memory (NVRAM).
2.6 Boot Setup Figure 2.14 Boot setup Note! “Hard Disk Drives” will only appear on the setup screen when at least one hard disk drive is connected to the MIC-3392MIL.
! ! ! ! ! ! Figure 2.15 Boot settings configuration Quick Boot: Allows the BIOS to skip certain tests while booting. This will decrease the time needed to boot the system. The default setting is on “Enabled”. Boot From LAN Support: Used to set the system bootable from LAN. The default setting is on “Disabled”. Quiet Boot: Used to display OEM logo when the setting is “Enabled”. The default setting, “Disabled”, displays normal POST messages.
2.7 Security Setup Figure 2.16 Password configuration Select Security Setup from the MIC-3392MIL Setup main BIOS setup menu. All Security Setup options, such as password protection and virus protection, are described in this section.
Chapter 2 2.8 Advanced Chipset Settings 2.8.1 North Bridge Chipset Configuration ! ! ! Figure 2.18 North bridge chipset configuration DRAM Frequency: Available settings are “Auto” (default), “400MHz”, “533MHz”, and “667MHz”. Configure DRAM timing by SPD: Available settings are “Enable” (default) and “Disabled”. Internal Graphics Mode Select: Available settings are “Enabled, 8 MB” (default), “Enabled, 1 MB”, and “Disabled”. 37 MIC-3392MIL User Manual AMI BIOS Setup Figure 2.
2.8.1.1 Video Function Configuration ! ! ! Figure 2.19 Video function configuration DVMT Mode Select: Available settings are “DVMT Mode” (default), “Fixed Mode”, and “Combo Mode”. – DVMT Mode: the 945GME will dynamically allocate system memory as graphics memory when graphics-intensive applications are running. However, when the need for graphics memory drops, the allocated graphics memory can be released to the operating system for other uses.
Figure 2.20 South bridge chipset configuration USB 2.0 Controller: Settings are “Enabled” (default) and “Disabled”. 39 MIC-3392MIL User Manual AMI BIOS Setup ! Chapter 2 2.8.
2.9 Exit Options Figure 2.21 Exit options 2.9.1 Save Changes and Exit When you have completed the system configuration changes, follow these steps: 1. Select Exit Saving Changes from the Exit menu and press . The following messages appear on the screen: Save Configuration Changes and Exit Now? [Ok] [Cancel] 2. Select “Ok” to save changes and exit. 2.9.2 Discard Changes and Exit Follow these steps to quit Setup without making any permanent changes to the system configuration. 1.
Chapter 3 3 Pre-heating for the MIC-3392MILC This chapter describes how the pre-heat feature works for the MIC-3392MILC.
3.1 Introduction The pre-heat feature provides an automatic control mechanism for the reliable cold bootup of the MIC-3392MILC. Equipped with a heat pad on the conduction-cooled plate and special BMC firmware for its control, if the ambient board temperature is too low for stable power-on, the preheating circuit powers up the heat pad and keeps the board in reset until the board temperature reaches a safe operating temperature.
Note! More +12 V power to the pre-heat pad can be made available via pins 1 through 3 on CN13, with customized J3 ~ J5 pin definitions and CompactPCI backplane. 3.2 Pre-heat Firmware Operation The pre-heat code in the firmware will be executed when the board temperature (as measured by DS1631AU) is below a predefined threshold (TEMP_PREHEAT) and the board is powered on. By default, TEMP_PREHEAT is set at -30° C.
3.2.2 Extended Pre-heat Mode The extended preheat mode will have the same implementation as the standard preheat mode but will add one extra feature: ! During the warm up phase, the BMC will repeatedly de-assert the system reset for PREHEAT_TON and then assert it for PREHEAT_TOFF to cause extra power dissipation by CPU and chipset. Note! PREHEAT_TON = Time duration [second] of system reset de-assertion in extended pre-heat mode.
INDEX [Hex] Description Direction Default Value [Hex] 0x00 DEVID_MSB Device ID register MSB read only (FW fixed) 0x33 0x01 DEVID_LSB Device ID register LSB 0x02 FW_REV_MSB FW version register MSB read only (FW fixed) xx 0x03 FW_REV_LSB FW version register LSB read only (FW fixed) xx 0x08 REG_SCRATCH Scratch register read write (static init) 0x00 0x10 TEMP_DS1631 DS1613 temp value read only (dynamic reading) xx 0x20 TEMP_PREHEAT Temperature limit for preheat circuit activation rea
3.2.4 Read/Write the Internal Registers The user will need the following items to build the setup as shown in Figure 3.3 in order to gain access to the internal registers for the pre-heat function. ! MIC-3392MILC ! RIO-3392MIL ! CompactPCI chassis (or backplane with at least a system slot) that can accommodate both the MIC-3392MILC and RIO-3392MIL ! CompactPCI power supply ! USB or PS/2 Keyboard ! USB floppy disk drive ! Floppy disk containing MS-DOS and a DOS utility called “debug32.
! ! Power up the equipment set-up as shown in Figure 3.3 and boot to DOS. Type in “debug32” on the DOS prompt and press key (see Figure 3.4). 3.2.5.1 Read DS1631AU’s Temperature Reading (TEMP_DS1631) The index register for the DS1631 thermal sensor’s temperature reading is 0x10 (see Table 3.1).
3.2.5.2 Modify Temperature Limit for Pre-heat Circuit Activation (TEMP_PREHEAT) The index register for TEMP_PREHEAT is 0x20 (see Table 3.1). The default value for the pre-heat circuit activation is “E2” (-30° C), which can be modified as follows. ! For example, change the temperature limit from -30° C (E2) to -20° C (EC).
Equivalent Hex Value Degrees Celsius Equivalent Hex Value 0 00 1 01 -1 FF 2 02 -2 FE 3 03 -3 FD 4 04 -4 FC 5 05 -5 FB 6 06 -6 FA 7 07 -7 F9 8 08 -8 F8 9 09 -9 F7 10 0A -10 F6 11 0B -11 F5 12 0C -12 F4 13 0D -13 F3 14 0E -14 F2 15 0F -15 F1 16 10 -16 F0 17 11 -17 EF 18 12 -18 EE 19 13 -19 ED 20 14 -20 EC 21 15 -21 EB 22 16 -22 EA 23 17 -23 E9 24 18 -24 E8 25 19 -25 E7 26 1A -26 E6 27 1B -27 E5 28
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Chapter 4 4 IPMI for the MIC3392MILS This chapter describes IPMI configuration for the MIC-3392MILS.
4.1 Introduction The MIC-3392MILS fully supports the IPMI 2.0 interface and the PICMG 2.9 R1.0 specification. The Renesas H8S/2167 has been implemented as the IPMI controller / Baseboard Management Controller (BMC) to run firmware and collect information. The MIC-3392MILS IPMI firmware is sourced from Avocent, a provider of proven and tested IPMI implementations in a wide range of mission-critical applications. The BMC’s key features and functions are listed below.
The following standard IPMI commands are supported. Note! 4.3.1 IPMI Device Global Commands Table 4.1: Supported IPMI device global commands IPMI Device Global Commands NetFn Cmd Mandatory / Optional Get Device Id App 0x01 M Cold Reset App 0x02 O Get Self Test Results App 0x04 M Manufacturing Test On App 0x05 O Set ACPI Power State App 0x06 O Get ACPI Power State App 0x07 O Get Device GUID App 0x08 O 4.3.
Table 4.
Table 4.
4.3.7 SEL Device Commands Table 4.9: SEL device commands SEL Device Command NetFn Cmd Mandatory / Optional Get SEL Info Storage Storage 0x40 M Reserve SEL Storage Storage 0x42 O Get SEL Entry Storage Storage 0x43 M Add SEL Entry Storage Storage 0x44 M Clear SEL Storage Storage 0x47 M Get SEL Time Storage Storage 0x48 M Set SEL Time Storage Storage 0x49 M 4.3.8 SDR Device Commands Table 4.
Sensor data record (SDR) repository will be stored in BMC’s flash memory and cannot be changed. Note! Table 4.
Table 4.13: Threshold values of sensors Sensor Number 10h Entity Instance 01h 11h 12h 13h 14h 15h 20h 01h 01h 01h 01h 01h 01h Nominal Reading 1.2 V 1.5 V 3.3 V 12 V -12 V 1.8 V 30° C UNR N/A N/A N/A N/A N/A N/A 55° C UC 1.44 V 1.65 V 3.63 V 13.2 V -10.8 V 1.98 V 50° C UNC N/A N/A N/A N/A N/A N/A N/A LNR N/A N/A N/A N/A N/A N/A N/A LC 0.8 V 1.35 V 2.97 V 10.8 V -13.2 V 1.
The BMC can initiate a graceful shutdown of the MIC-3392MILS by issuing a short pulse (~500 ms) on the power button signal to the ACPI controller when commanded through its host, OOB, or IPMB channels as well as from a Graceful Shutdown Event from the CMM or a Handle OPEN event. An ACPI compliant OS will then perform a graceful shutdown and light the blue LED whereas a non-compliant OS will just shut down. The Network function (NetFn) field identifies the functional class of the message.
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Appendix A A Pin Assignments This appendix describes pin assignments.
A.1 J1 Connector Table A.1: J1 CompactPCI I/O Pin Z A B C D E F 25 GND 5V REQ64# ENUM# 3.3 V 5V GND 24 GND AD (1) 5V NC AD (O) ACK64# GND 23 GND 3.3 V AD (4) AD (3) 5V AD (2) GND 22 GND AD (7) GND 3.3 V AD (6) AD (5) GND 21 GND 3.3 V AD (9) AD (8) M66EN (3) C/BE (0)# GND 20 GND AD (12) GND NC AD (11) AD (10) GND 19 GND 3.3 V AD (15) AD (14) GND AD (13) GND 18 GND SERR# GND 3.3 V PAR C/BE (1)# GND 17 GND 3.
Table A.
A.3 J3 Connector Table A.3: J3 CompactPCI I/O (LAN1/LAN2, 2.
Table A.
Note! NC: No Connect A.5 J5 Connector Table A.
Table A.6: CN4 SATA daughter board connector 1 GND 2 GND 3 GND 4 v SATA_TX0P 5 GND 6 SATA_TX0N 7 GND 8 GND 9 GND 10 SATA_RX0N 11 GND 12 SATA_RX0P 13 GND 14 GND 15 RSV (+3.3 V/+12 V) 16 +5 V 17 RSV (+3.3 V/+12 V) 18 +5 V 19 RSV (+3.3 V/+12 V) 20 +5 V 67 MIC-3392MIL User Manual Appendix A Pin Assignments A.
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Appendix B B Pin Assignments This appendix describes front panel LEDs on the MIC-3392MILS.
B.1 M/D, PWR, BMC HB, and IDE/Hot-swap LEDs Name Description M/D (Green) Indicates Master or Drone mode status PWR (Green) Indicates power status BMC HB (Yellow) Indicates BMC status (heart beat to indicate BMC active) HDD/Hot Swap (Yellow/Blue) Indicates IDE activity when yellow, or that the board is ready to be hot-swapped when blue.
Appendix C C Programming the Watchdog Timer This appendix describes how to program the watchdog timer.
C.1 Watchdog Timer Programming Procedure To program the watchdog timer, you must execute a program that writes a value to I/ O port address 443/444 (hex) for Enable/Disable. This output value represents time interval. The value range is from 01 (hex) to FF (hex), and the related time interval is 1 to 255 seconds. Data Time Interval 01 1 sec 02 2 sec 03 3 sec 04 4 sec ..
Appendix D D CPLD This appendix describes CPLD configuration.
D.1 Features ! ! ! ! ! ! Drone Mode Hot-Swap: Hot insertion and removal control CompactPCI Backplane: CompactPCI slot Addressing LPC Bus: Provide LPC Bus access Watchdog Debug Message: Boot time POST message D.2 CPLD I/O Registers The Advantech MIC-3392MIL CPLD communicates with four main I/O spaces. The LPC unit is used to interconnect the Intel ICH7M LPC signals. The Debug Port Unit is used to decode POST codes.
Table D.4: Watchdog [7:0] (LPC I/O address: 444H) Bits Name Default State 7~0 Watchdog xxh Valid State Read Only Function xxh Reading I/O port 444h will disable the watchdog. The return value is meaningless. Table D.5: Version [7:0] (LPC I/O address: 445H) Bits Name Default State Valid State Read Only Function 7~4 CPLD Version (units) xxh xxh Read I/O port 444h to get the CPLD version in BCD. E.g, for v1.
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Appendix E Glossary E
ACPI APM BMC CF CMOS CPU CPCI DMA DVI DVMT FSB FRU FWH GB GMCH GPIO IC ICH IDE I/O IPMB IPMI KCS HDD LCD LPC LV MIPS OOB OS PCB PEF PICMG PnP PWR RIO RTC RTM SATA SBC SDR SEEPROM SEL ULV VGA MIC-3392MIL User Manual Advanced Configuration and Power Interface Advanced Power Management Baseboard Management Controller CompactFlash Complementary Metal-Oxide-Semiconductor Central Processing Unit CompactPCI Direct Memory Access Digital Visual Interface-Integrated Dynamic Video Memory Technology Front Side Bus Fi
Appendix E Glossary 79 MIC-3392MIL User Manual
www.advantech.com Please verify specifications before quoting. This guide is intended for reference purposes only. All product specifications are subject to change without notice. No part of this publication may be reproduced in any form or by any means, electronic, photocopying, recording or otherwise, without prior written permission of the publisher. All brand and product names are trademarks or registered trademarks of their respective companies. © 2008 Advantech Co., Ltd.
