User manual
ARK-4180 User Manual 24
Summary Screen Show [Enabled]
Show system status on Summary screen page.
3.2.4 Advanced Chipset Features
DRAM Timing Selectable [By SPD]
This item enables users to set the optimal timings for items 2 through 5.,The system
default setting of “By SPD” to follow the SPD information ensures the system runs
with stable and optimal performance.
CAS Latency Time [Auto]
This item enables users to set the timing delay in clock cycles before SDRAM starts a
read command after receiving it.
DRAM RAS# to CAS# Delay [Auto]
This item enables users to set the timing of the transition from RAS (row address
strobe) to CAS (column address strobe) as both rows and column are separately
addressed shortly after DRAM is refreshed.
DRAM RAS# Precharge [Auto]
This item enables users to set the DRAM RAS# precharge timing. The system
default setting is “Auto” which references the data from SPD ROM.
System BIOS Cacheable [Enabled]
This item allows the system BIOS to be cached to allow faster execution and better
performance.
Video BIOS Cacheable [Disabled]
This item allows video BIOS to be cached to allow faster execution and better perfor-
mance.
Memory Hole At 15M-16M [Disabled]
This item reserves 15MB-16MB memory address space to ISA expansion cards that
specifically require the setting. Memory from 15MB-16MB will be unavailable to the
system because of the expansion cards can only access memory at this area.
Note! The “Advanced Chipset Features” option controls the configuration of
the board’s chipset, it is developed to chipset independent, for fine tun-
ing system performance. It is strongly recommended only technical
users make changes to the default settings.