User manual

Table Of Contents
27 ARK-3399 User Manual
Chapter 3 BIOS Operation
3.2.4 Advanced Chipset Features
DRAM Timing Selectable [By SPD]
This option refers to the method by which the DRAM timing is selected.
The default is “By SPD”.
Manual This item is provided dram clock/drive for User select.
By SPD This item is provided dram clock/drive for SPD (Serial Presence
Detect).
System BIOS Cacheable [Enabled]
This item allows the system BIOS to be cached to allow faster execution and better
performance.
Video BIOS Cacheable [Disabled]
This item allows the video BIOS to be cached to allow faster execution and better
performance.
Memory Hole [Disabled]
This item reserves 15MB-16MB memory address space to ISA expansion cards that
specifically require the setting. Memory from 15 MB-16 MB will be unavailable to the
system because of the expansion cards can only access memory at this area.
PCI Express Root Port Func [Press Enter]
This item is setting for PCI Express device.
PEG/Onchip VGA Control [Onchip VGA]
This item is setting for start up Video output from Add-on-Card or Onboard device.
On-Chip Frame Buffer Size [8MB]
The default setting is 8MB. The options available include 1 MB and 8 MB.
Note! This “Advanced Chipset Features” option controls the configuration of
the boardís chipset, this page is developed by Chipset independent, for
control chipset register setting and fine tune system performance. It is
strongly recommended only technical users make changes to the
default settings.