User`s manual
ix
3.4.10 Boot Up NumLock Status............................................. 33
3.4.11 Gate A20 Option........................................................... 33
3.4.12 Typematic Rate Setting................................................. 33
3.4.13 Typematic Rate (Chars/Sec) ......................................... 33
3.4.14 Typematic Delay (msec)............................................... 33
3.4.15 Security Option ............................................................. 34
3.4.16 APIC Mode ................................................................... 34
3.4.17 MPS Version Control For OS....................................... 34
3.4.18 OS Select For DRAM > 64MB .................................... 34
3.5 Advanced Chipset Features............................................. 34
3.5.1 DRAM Timing Selectable ............................................ 35
3.5.2 CAS Latency Time ....................................................... 35
3.5.3 Active to Precharge Delay ............................................ 35
3.5.4 DRAM RAS# to CAS# Delay ..................................... 35
3.5.5 DRAM RAS# Precharge............................................... 35
3.5.6 Memory Frequency....................................................... 35
Figure 3.4:Advanced chipset features screen ............... 35
3.5.7 System BIOS Cacheable............................................... 36
3.5.8 Video Bios Cacheable................................................... 36
3.5.9 Memory Hole At 15M-16M ......................................... 36
3.5.10 Delay Prior to Thermal ................................................. 36
3.5.11 AGP Aperture Size (MB) ............................................. 36
3.5.12 Init Display First .......................................................... 36
3.5.13 On-Chip VGA............................................................... 36
3.5.14 On-Chip Frame Buffer Size .......................................... 36
3.6 Integrated Peripherals...................................................... 37
Figure 3.5:Integrated peripherals.................................. 37
Figure 3.6:On-Chip IDE Device................................... 37
3.6.1 IDE HDD Block Mode ................................................. 38
3.6.2 On-Chip IDE Device .................................................... 38
3.6.3 On-Chip Serial ATA..................................................... 38
3.6.4 Serial ATA Port0/Port1 Mode ...................................... 38
Figure 3.7:Onboard Device........................................... 38
3.6.5 USB Controller ............................................................. 39
3.6.6 USB 2.0 Controller ....................................................... 39
3.6.7 USB Keyboard/Mouse Support .................................... 39
3.6.8 AC97 Audio.................................................................. 39
3.6.9 Onboard LAN1 Control................................................ 39
3.6.10 Onboard LAN2 Control ................................................ 39
3.6.11 Onboard LAN Boot ROM ............................................ 39
Figure 3.8:SuperIO Device ........................................... 39
3.6.12 Onboard FDC Controller .............................................. 40
3.6.13 Onboard Serial Port 1 ................................................... 40
3.6.14 Onboard Serial Port 2 ................................................... 40
3.6.15 UART Mode Select ...................................................... 40