User`s manual

AIMB-742 User’s Manual 12

1.8.3 Watchdog timer output (J2)

The AIMB-742 contains a watchdog timer that will reset the CPU or send

a signal to IRQ11 in the event the CPU stops processing. This feature

means the AIMB-742 will recover from a software failure or an EMI

problem. The J2 jumper settings control the outcome of what the com-

puter will do in the event the watchdog timer is tripped.

1.9 System Memory

The AIMB-742 has four sockets for 184-pin dual inline memory modules

(DIMMs) in two separated memory channels. It can operate with single

channel or dual channel modules. We recommend to use dual channel

mode to provide optimized performance.

All these sockets use 2.5 V unbuffered double data rate synchronous

DRAMs (DDR SDRAM). They are available in capacities of 128, 256,

Clear CMOS data

* default setting

Table 1.4: Watchdog timer output (J2)

Function

Jumper Setting

IRQ11

* Reset

* default setting

Note: The interrupt output of the watchdog timer is a

low level signal. It will be held low until the

watchdog timer is reset.

Table 1.3: CMOS (J1)

2-3 closed

1-2 closed

2-3 closed