User manual

ix
Contents
Table 1.1:AIMB-554 Memory Tested for Compatibilityv
Chapter 1 Hardware Configuration .................................2
1.1 Introduction ....................................................................... 2
1.2 Features ............................................................................. 3
1.3 Specifications .................................................................... 3
1.3.1 System............................................................................. 3
1.3.2 Memory........................................................................... 4
1.3.3 Input/Output.................................................................... 4
1.3.4 Graphics .......................................................................... 4
1.3.5 Ethernet LAN.................................................................. 5
1.3.6 Industrial features ........................................................... 5
1.3.7 Mechanical and environmental specifications................ 5
1.4 Jumpers and Connectors.................................................... 6
Table 1.1:Jumpers........................................................... 6
Table 1.2:Connectors...................................................... 6
1.5 Board Layout: Jumper and Connector Locations.............. 8
Figure 1.1:Jumper and Connector locations ................... 8
Figure 1.2:I/O Connectors .............................................. 8
1.6 AIMB-554 Block Diagram................................................ 9
Figure 1.3:AIMB-554 Block Diagram............................ 9
1.7 Safety Precautions .......................................................... 10
1.8 Jumper Settings ............................................................... 11
1.8.1 How to set jumpers ....................................................... 11
1.8.2 CMOS clear (J1) ........................................................... 11
Table 1.3:CMOS (J1).................................................... 11
1.8.3 Watchdog timer output (J2) .......................................... 12
Table 1.4:Watchdog timer output (J2).......................... 12
Table 1.5:ATX/AT Mode selector (J12)....................... 12
1.8.4 COM2 RS 232/422/485 mode selector (J13)................ 13
Table 1.6:COM2 RS 232/422/485 mode selector (J13) 13
1.9 System Memory .............................................................. 14
1.9.1 CPU FSB and memory speed ....................................... 14
1.10 Memory Installation Procedures ..................................... 14
1.11 Cache Memory ................................................................ 14
1.12 Processor Installation ...................................................... 15
1.13 PCI Bus Routing Table ................................................... 15
Table 1.7:PCI Bus Routing Table................................. 15
Chapter 2 Connecting Peripherals .................................18
2.1 Introduction ..................................................................... 18
2.2 Primary (CN1) IDE Connector ....................................... 18