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Advance Technologies; Automate the World.

Manual Rev. 1.00

Revision Date: September 25, 2014

Part No: 50-1Y002-1000

CT-61

Rugged Conduction Cooled Low Power 6U CompactPCI

Processor Blade with Intel

Core™ i7 and Two PMC Sites

User’s Manual

Summary of content (88 pages)

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CT-61 Rugged Conduction Cooled Low Power 6U CompactPCI Processor Blade with Intel® Core™ i7 and Two PMC Sites User’s Manual Manual Rev. 1.00 Revision Date: September 25, 2014 Part No: 50-1Y002-1000 Advance Technologies; Automate the World.
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Revision History Revision Release Date 1.
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CT-61 Preface Copyright 2014 ADLINK Technology Inc. This document contains proprietary information protected by copyright. All rights are reserved. No part of this manual may be reproduced by any mechanical, electronic, or other means in any form without prior written permission of the manufacturer. Disclaimer The information in this document is subject to change without prior notice in order to improve reliability, design, and function and does not represent a commitment on the part of the manufacturer.
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Conventions Take note of the following conventions used throughout this manual to make sure that users perform certain tasks and instructions properly. Additional information, aids, and tips that help users perform tasks. NOTE: CAUTION: WARNING: iv Information to prevent minor physical injury, component damage, data loss, and/or program corruption when trying to complete a task.
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CT-61 Table of Contents Revision History...................................................................... ii Preface .................................................................................... iii List of Tables......................................................................... vii List of Figures ........................................................................ ix 1 Overview ............................................................................. 1 1.1 Introduction .......
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5 Getting Started .................................................................. 29 5.1 CT-61 Blade Installation..................................................... 29 5.2 PMC/XMC Module Installation ........................................... 30 6 Driver Installation.............................................................. 31 6.1 Driver Installation Procedure.............................................. 31 7 Utilities ........................................................................
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CT-61 List of Tables Table 2-1: Table 2-2: Table 2-3: Table 2-4: Table 4-1: Table 4-2: Table 4-3: Table 4-4: Table 4-5: Table 4-6: Table 4-7: Table 4-8: Table 4-9: List of Tables CT-61 Specifications ................................................ 6 CompactPCI Input Voltage Characteristics .............. 7 Idle Mode Power Consumption ................................ 8 100% CPU Usage Power Consumption ................... 8 XMC Connector Pin Definition ................................
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CT-61 List of Figures Figure 1-1: CT-61 Block Diagram ................................................ 3 Figure 4-1: CT-61 Board Layout - Top Side............................... 15 Figure 4-2: CT-61 Board Layout - Bottom Side .........................
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CT-61 1 Overview 1.1 Introduction The CT-61 is a conduction cooled 6U CompactPCI single board computer in single slot width (4HP) form factor supporting 32nm Intel® Core™ i7 SV, LV, ULV processors with integrated graphics and ECC memory controller onboard. The CT-61 provides up to 8GB of dual channel DDR3-800/1066 ECC memory soldered onboard and implements the Mobile Intel® QM57 Express Chipset to provide a full feature set and optimal performance per watt.
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1.2 Features X 6U CompactPCI SBC in 4HP width form factor X µFC-BGA package Intel® Core™ i7 processor, up to 2.53GHz X Mobile Intel® BD82QM57 PCH (Platform Controller Hub) X Dual Channel DDR3 ECC SDRAM at 800 or 1066MHz soldered onboard, up to 8GB X 64-bit/66MHz CompactPCI Interface based on PCI specifications, 3.
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CT-61 1.3 Block Diagram Soldered w/ ECC, max. 4GB Soldered w/ ECC, max. 4GB SPI BIOS DDR3 800/1066 Intel® Core™i7 PCIe x8 Pericom PI7C9X13 PCIe Switch PCIe x4 DMI QM57 PCH PCIe x8 SATA1 XMC LPC PMC 1 SIO ITE8783 PCIe x4 Pericom PI7C9X13 COM4 PCI 64b/66M PCI-X 64b/133M BMC PMC 2 2.
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1.
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CT-61 2 Specifications 2.1 CT-61 Specifications CompactPCI Standard PICMG® 2.0 CompactPCI® Rev. 3.0 PICMG® 2.1 Hot Swap Specification Rev.2.0 PICMG® 2.9 System Management Bus Rev. 1.0 PICMG® 2.16 Packet Switching Backplane Rev.1.0 Standard 6U CompactPCI® Mechanical Board size: 233.23 mm x 160mm Single slot (4HP, 20.32mm) width CompactPCI® connectors J1, J2, J3, J4 and J5 Processor µFC-BGA Intel® Core™i7-610E, 4MB L2 cache, 2.53GHz µFC-BGA Intel® Core™i7-620LE, 4MB L2 cache, 2.
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IPMI Interface Supports PICMG® 2.9 secondary system management bus IPMI functions implemented as defined by IPMI Spec. v1.
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CT-61 2.2 Power Requirements In order to guarantee a stable functionality of the system, it is recommended to provide more power than the system requires. An industrial power supply unit should be able to provide at least twice as much power as the entire system requires of each voltage. An ATX power supply unit should be able to provide at least three times as much power as the entire system requires. The tolerance of the voltage lines described in the CompactPCI specification (PICMG 2.0 R3.
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Power Consumption This section provides information on the power consumption of the CT-61 with different CPUs, 2GB DDR3-800/1066 soldered memory, and 100GB SATA HDD. The system was tested in Idle Mode and Full Load Mode under Windows XP running Burn-in Test 6.0. The CT-61 is powered by 5V and 3.3V. Idle Mode under Windows XP CPU Core™ i7 610E Voltage Current (V) (A) Power (W) Core™ i7 620LE Current (A) Power (W) Core™ i7 620UE Current (A) Power (W) +3.3 4.19 13.82 4.12 18.41 3.85 12.71 +5 1.
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CT-61 2.3 Thermal Management Features When the CPU temperature exceeds its maximum junction temperature (Tj,Max), the CPU’s thermal management features will reduce power consumption (and thus performance) in an attempt to reduce the core junction temperature. Use of the CPU’s thermal management features is intended for short periods of time when running power intensive applications.
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CT-61 3 Functional Description The following sections describe the CT-61 features and functions. 3.1 Processor Intel® Core™ i7 Processor The Intel® Core™ i7-620LE/UE and i7-610E are 64-bit, multi-core mobile processors built on a 32 nanometer process technology. The processors are designed for a two-chip platform consisting of a processor and the Platform Controller Hub (PCH) and enables higher performance, lower cost, easier validation, and improved x-y footprint.
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System Memory Support X Two channels of DDR3 memory soldered onboard X Memory DDR3 data transfer rates of 800 and 1066 MT/s X 64-bit wide channels (72-bit wide including ECC) X Supports ECC unbuffered DDR3 memory X Theoretical maximum memory bandwidth of: Z 12.8 GB/s in dual-channel mode assuming DDR3 800 MT/s Z 17.1 GB/s in dual-channel mode assuming DDR3 1066 MT/s X 1-Gb and 2-Gb DDR3 DRAM technologies for x8 devices X Using 2Gb device technologies, the largest memory capacity is 8GB 3.
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CT-61 3.3 Super I/O The ITE IT8783F Super I/O is on a Low Pin Count interface supporting PS/2 keyboard/mouse, 16C550-compatible serial ports, floppy drive interface, hardware monitor function to monitor CPU voltage, CPU temperature, power supply voltages and system temperature, and Watchdog Timer with time resolution from minimum 1 second or minute to maximum 65,535 seconds or minutes. 3.4 Battery The CT-61 is provided with a 3.0V/0.2F gold cap for the Real Time Clock (RTC).
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3.6 BIOS Recovery The CT-61 features AMI® EFI BIOS with BIOS recovery. If the BIOS becomes corrupted and you are unable to boot your system, follow the instructions in Section 7.3 “BIOS Recovery” on page 39.
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CT-61 4 Board Interfaces This chapter describes the board layout, connector pin assignments, and jumper settings of the CT-61. 4.1 CT-61 Board Layout - Top Side 160 J5 JN6 JN2 JN3 JN4 J4 J3 233.
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4.
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CT-61 4.3 Connector Pin Assignments Refer to “CT-61 Board Layout - Top Side” on page 15 and “CT-61 Board Layout - Bottom Side” on page 16 for connector locations. XMC Connector (CN8) Pin# A B C D E F 1 PETp0 PETn0 3.3V PETp1 PETn1 VPWR MRSTI# 2 GND GND TRST# GND GND 3 PETp2 PETn2 3.3V PETp3 PETn3 VPWR 4 GND GND TCK GND GND MRSTO# 5 PETp4 PETn4 3.3V PETp5 PETn5 VPWR 6 GND GND TMS GND GND +12V 7 PETp6 PETn6 3.
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PMC Connector (JN1/5, JN2/6, JN3/7, JN4/8) Pin# JN1/5 Signal JN2/6 Signal JN3/7 Signal JN4/8 Signal 1 PMC_TCK P12V NC PIO1 2 N12V PMC_TRST-L GND PIO2 3 GND PMC_TMS GND PIO3 4 PCIX_INTA-L NC (PMC_TDO) PCIX_CBE-L7 PIO4 5 PCIX_INTB-L PMC_TDI PCIX_CBE-L6 PIO5 6 PCIX_INTC-L GND PCIX_CBE-L5 PIO6 7 PMC_MOD-L1 GND PCIX_CBE-L4 PIO7 8 P5V NC GND PIO8 9 PCIX_INTD-L NC PMC_VIO PIO9 10 NC NC PCIX_PAR64 PIO10 11 GND PMC_MOD-L2 PCIX_AD63 PIO11 12 P3V3_PMCAUX P3V
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CT-61 Pin# JN1/5 Signal JN2/6 Signal JN3/7 Signal JN4/8 Signal 33 PCIX_FRAME-L GND GND PIO33 34 GND NC PCIX_AD48 PIO34 35 GND PCIX_TRDY-L PCIX_AD47 PIO35 36 PCIX_IRDY-L P3V3 PCIX_AD46 PIO36 37 PCIX_DEVSEL-L GND PCIX_AD45 PIO37 38 P5V PCIX_STOP-L GND PIO38 39 PCIX_PCIXCAP PCIX_PERR-L GND PIO39 40 PCIX_LOCK-L GND PCIX_AD44 PIO40 41 NC P3V3 PCIX_AD43 PIO41 42 NC PCIX_SERR-L PCIX_AD42 PIO42 43 PCIX_PAR PCIX_CBE-L1 PCIX_AD41 PIO43 44 GND GND GND PI
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CompactPCI J1 Connector Pin Assignment Pin Z A B C D E F 1 GND +5V -12V TRST# +12V +5V GND 2 GND TCK# +5V TMS# NC TDI# GND 3 GND IRQA# IRQB# IRQC# +5V IRQD# GND 4 GND +5V_IPMB HEALTHY# V(I/O) NC NC GND 5 GND NC NC RESET# GND GNT0# GND 6 GND REQ0# GND +3.3V CLK0 AD31 GND 7 GND AD30 AD29 AD28 GND AD27 GND 8 GND AD26 GND V(I/O) AD25 AD24 GND 9 GND CBE3# IDSEL AD23 GND AD22 GND 10 GND AD21 GND +3.
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CT-61 CompactPCI J2 Connector Pin Assignment Pin Z A B C D E F 1 GND CLK1 GND REQ1# GNT1# REQ2# GND 2 GND CLK2 CLK3 SYSEN# GNT2# REQ3# GND 3 GND CLK4 GND GNT3# REQ4# GNT4# GND 4 GND V(I/O) NC CBE7# GND CBE6# GND 5 GND CBE5# GND V(I/O) CBE4# PAR64 GND 6 GND AD63 AD62 AD61 GND AD60 GND 7 GND AD59 GND V(I/O) AD58 AD57 GND 8 GND AD56 AD55 AD54 GND AD53 GND 9 GND AD52 GND V(I/O) AD51 AD50 GND 10 GND AD49 AD48 AD47 GND AD46 GN
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CompactPCI J3 Pin Assignment Pin Z B C D E F 1 GND HDA_RST# HDA_SYNC HDA_BIT_CLK HDA_SDOUT HDA_SDIN0 GND 2 GND HDA_SDIN1 HDA_SDIN2 NC KBCLK NC MSDATA MSCLK SATA-TX4- GND SATA-TX3+ SATA-TX3- GND GND NC GND GND GND SATA-RX4- GND SATA-RX3+ SATA-RX3- GND COM4-RX COM3-DCD# IPMB_CLK IPMB_DAT GND COM3-TX COM3-DTR# COM3-DSR# COM3-RTS# GND COM3-RI# RGB-BLUE RGB-RED RGB-GREEN GND 3 GND A KBDATA 4 GND SATA-TX4+ 5 GND GND 6 GND SATA-RX4+ 7 GND COM4-TX 8 GND COM3-
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CT-61 CompactPCI J4 Connector Pin Assignment Pin Z A B C 1 GND NC PMC1 IO:64 PMC1 IO:63 PMC1 IO:62 PMC1 IO:61 GND 2 GND PMC1 IO:60 PMC1 IO:59 PMC1 IO:58 PMC1 IO:57 PMC1 IO:56 GND 3 GND PMC1 IO:55 PMC1 IO:54 PMC1 IO:53 PMC1 IO:52 PMC1 IO:51 GND 4 GND PMC1 IO:50 PMC1 IO:49 PMC1 IO:48 PMC1 IO:47 PMC1 IO:46 GND 5 GND PMC1 IO:45 PMC1 IO:44 PMC1 IO:43 PMC1 IO:42 PMC1 IO:41 GND 6 GND PMC1 IO:40 PMC1 IO:39 PMC1 IO:38 PMC1 IO:37 PMC1 IO:36 GND 7 GND PMC1 IO:35 PMC1 IO:34
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CompactPCI J5 Pin Assignment Pin Z A B C D E F 1 GND PCIE-TX0+ PCIE-TX0- GND PCIE-RX0+ PCIE-RX0- GND 2 GND PCIE-TX1+ PCIE-TX1- GND PCIE-RX1+ PCIE-RX1- GND 3 GND PCIE-TX2+ PCIE-TX2- GND PCIE-RX2+ PCIE-RX2- GND 4 GND PCIE-TX3+ PCIE-TX3- GND PCIE-RX3+ PCIE-RX3- GND 5 GND GND GND GND GND GND GND 6 GND PCIE-CLK+ PCIE-CLK- GND RESET# NC GND 7 GND GND GND RTC GND GND GND 8 GND LVDS_DATA3- LVDS_DATA3+ NC LVDS_CLK LVDS_DATA GND 9 GND GPIO1 GPI
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CT-61 4.4 Switch and Jumper Settings Refer to “CT-61 Board Layout - Top Side” on page 15 and “CT-61 Board Layout - Bottom Side” on page 16 for switch locations. SW1 & SW4 (Debug use only) The switches SW1 & 4 are for debugging purposes and should be left in the default settings. The default setting of SW1 is all OFF; the default setting of SW4 is Pin 1 OFF and Pin 2 ON. Mode Switch (SW2) Switch SW2 is a multi purpose switch that allows users to define the board operating mode.
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Pin# Status OFF The CT-61 cannot boot-up when installed in a peripheral slot if there is no host board in the system slot. ON The CT-61 is able to boot-up when installed in a peripheral slot if there is no host board in the system slot. The CT-61 behaves as a system board in all slots. (Set this pin to "ON" if the CT-61 is installed in a blade server backplane). OFF The CT-61 power on/off is state is controlled by the ejector handle state. ON Force the ejector handle state to "closed".
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CT-61 Clear CMOS Switch (SW6) Press switch SW6 to clear the CMOS and reset the CMOS values to default.
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CT-61 5 Getting Started This chapter describes the installation of the following components to the CT-61. X CT-61 Blade installation X PMC/XMC module installation 5.1 CT-61 Blade Installation 1. Carefully align the edges of the blade with the edges of the slot. 2. Check that all the wedge locks lie flat against the board. 3. Slide the blade into the slot. 4. Tighten the wedge locks using a hex torque screwdriver set to 6.0 ±0.5 kgf·cm (0.59 ±0.05 N·m).
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5.2 PMC/XMC Module Installation The CT-61 provides one PMC and one PMC/XMC slot. The PMC/XMC slots support 3.3V V(I/O) and 5V VPWR only. For optional 5V V(I/O) and 12V VPWR support, please contact ADLINK. Installing a PMC/XMC Module 1. Align the male connectors of the PMC/XMC card (component-side down) to the female connectors of the CT-61 and press down. 2. Secure the PMC/XMC card to the CT-61 by attaching the screws provided with the card from the bottom side of the board.
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CT-61 6 Driver Installation The CT-61 drivers can be found on the ADLINK All-In-One CD at X:\cPCI\CT-61\ or from the ADLINK website (http://www.adlinktech.com). ADLINK provides validated drivers for chipset, graphics and LAN on Windows XP Professional, Windows Vista, and Windows 7. 6.1 Driver Installation Procedure The following describes the driver installation procedures for Windows XP. 1. Install the Windows operating system before installing any driver.
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CT-61 7 Utilities 7.1 Watchdog Timer This section describes the operation of the CT-61’s watchdog timer (WDT). The primary function of the WDT is to monitor the CT-61's operation and to reset the system if a software application fails to function as programmed.
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For a detailed programming sample, refer to the sample code provided on the ADLINK All-In-One CD. You can find it in the following directory: X:\cPCI\CT-61\WDT. Sample Code The sample program written in C shown below offers an interactive way to test the Watchdog Timer under DOS. #include #include
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CT-61 //Exit index port void Exit_IT8783_Config(unsigned int flag) { if(flag) IT8783_ioPort = 0x4e; outportb(IT8783_ioPort, 0x02); outportb(IT8783_ioPort+1, 0x02); } //Check chip void Get_IT8783_ID(unsigned int &ID1, unsigned int &ID2) { outportb(IT8783_ioPort, 0x20); ID1 = inportb(IT8783_ioPort+1); outportb(IT8783_ioPort, 0x21); ID2 = inportb(IT8783_ioPort+1); } //WDT and LED program void IT8783_3_WDTRun(unsigned int count_value, unsigned int PLEDflag) //for CT-61 { unsigned long tempCount; unsigned int re
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registerValue &= 0xfe; // set GP60 is alternate function outportb(IT8783_ioPort+1, registerValue); outportb(IT8783_ioPort, 0xCD); registerValue = inportb(IT8783_ioPort + 1); registerValue |= 0x01; // set GP60 is output outportb(IT8783_ioPort+1, registerValue); outportb(IT8783_ioPort, 0xf8); outportb(IT8783_ioPort+1, 0x30);// PLED mapping to GP60 outportb(IT8783_ioPort, 0xf9); registerValue = inportb(IT8783_ioPort + 1); registerValue |= 0x02; registerValue &= 0xfb; outportb(IT8783_ioPort+1, registerValue); }
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CT-61 tempCount = count_value / 60; if((count_value%60) > 30) tempCount++; if(tempCount > 65535) tempCount = 65535; printf("WDT timeout in %d minutes.\n", tempCount); } else { outportb(IT8783_ioPort, 0x72); registerValue = inportb(IT8783_ioPort+1); registerValue |= 0x80; tempCount = count_value; if(tempCount != 0) { printf("WDT timeout in %d seconds.\n", tempCount); registerValue |= 0x40; //Enable WDT output through KBRST } else { printf("WDT is Disabled.
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7.2 Preboot Execution Environment (PXE) The CT-61 supports the Intel® Preboot Execution Environment (PXE) that is capable of booting up or executing an OS installation through an Ethernet port. To use PXE, there must be a DHCP server on the network with one or more servers running PXE and MTFTP services. It could be a Windows® 2003 server running DHCP, PXE, and MTFTP services or a dedicated DHCP server with one or more additional servers running PXE and MTFTP services.
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CT-61 7.3 BIOS Recovery The CT-61 features AMI® EFI BIOS with BIOS recovery. If the BIOS becomes corrupted and you are unable to boot your system, the system will sound 4 beeps. Follow the instructions below to re-flash the BIOS and recover the system. 1. Download the BIOS recovery file “C6510000.ROM” from the product website at :http://www.adlinktech.com/PD/web/PD_ detail.php?cKind=&pid=1017 2. Prepare a bootable USB flash drive and copy the recovery file “C6510000.ROM” to the root directory. 3.
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6. During the BIOS recovery process, you will see the following: 7. After the flash update is completed, power down the system and restart. The system should now boot up normally.
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CT-61 7.4 Programming NT Mode EEPROM Map The CT-61 supports operation in peripheral slot as PCI device with PCI bus communication with the system board (Universal Mode). To operate in a peripheral slot in Non-Transparent mode, the PCIe-to-PCI bridge on the CT-61 should be set to Non-Transparent mode by programming the NT mode EEPROM map. The EEPROM map can be downloaded from the CT-61 product page on the ADLINK website: http://www.adlinktech.com/PD/web/PD_detail.
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CT-61 8 BIOS Setup Utility The following chapter describes basic navigation for the AMIBIOS®8 BIOS setup utility. 8.1 Starting the BIOS To enter the setup screen, follow these steps: 1. Power on the motherboard 2. Press the < Delete > key on your keyboard when you see the following text prompt: < Press DEL to run Setup > 3. After you press the < Delete > key, the main BIOS setup menu displays. You can access the other setup screens from the main BIOS setup menu.
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Setup Menu The main BIOS setup menu is the first screen that you can navigate. Each main BIOS setup menu option is described in this user’s guide. The Main BIOS setup menu screen has two main frames. The left frame displays all the options that can be configured. “Grayed” options cannot be configured, “Blue” options can be. The right frame displays the key legend. Above the key legend is an area reserved for a text message. When an option is selected in the left frame, it is highlighted in white.
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CT-61 Navigation Note: There is a hot key legend located in the right frame on most setup screens. Keyboard Commands Enter Selects the highlighted option or submenu. <> The Left and Right “Arrow” keys allow you to select a setup screen. ^v The Up and Down “Arrow” keys allow you to select a setup screen. +- The Plus and Minus keys allow you to change the field value of a particular setup item. Tab Moves the cursor to the next configurable item or to the next field.
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8.2 Main Setup When you first enter the Setup Utility, you will enter the Main setup screen. You can always return to the Main setup screen by selecting the Main tab. There are two Main Setup options. They are described in this section. The Main BIOS Setup screen is shown below. System Language Choose the system default language. System Time/System Date Use this option to change the system time and date. Highlight System Time or System Date using the < Arrow > keys. Enter new values using the keyboard.
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CT-61 8.3 Advanced BIOS Setup Select the Advanced tab from the setup screen to enter the Advanced BIOS Setup screen. You can select any of the items in the left frame of the screen, such as SuperIO Configuration, to go to the sub menu for that item. You can display an Advanced BIOS Setup option by highlighting it using the < Arrow > keys. The Advanced BIOS Setup screen is shown below. The sub menus are described on the following pages. Launch PXE OpROM Boot option for legacy network devices.
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PCI Subsystem Settings PCI Latency Timer Value to be programmed into PCI Latency Timer Register. Options: 32 PCI Bus Clocks, 64 PCI Bus Clocks, 96 PCI Bus Clocks, 128 PCI Bus Clocks, 160 PCI Bus Clocks, 192 PCI Bus Clocks, 224 PCI Bus Clocks, 248 PCI Bus Clocks. ASPM Support Set the ASPM (Active State Power Management) level.
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CT-61 CPU Configuration Hyper-Threading Enables/disables Hyper-Threading Technology. Active Processor Cores Number of cores to enable in each processor package. Options: All, 1, 2. Intel Virtualization Enables/disables Intel Virtualization Technology. Power Technology Power management feature. Options: Disabled, Energy Efficient, Custom. TDC Limit Turbo-XE Mode Processor TDC Limit in 1/8 A granularity. 0 means use the factory-configured value.
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SATA Configuration SATA Mode The SATA can be configured as a legacy IDE, RAID and AHCI mode. Serial ATA Controller 0 This item specifies whether SATA Controller 0 is initialized in Compatible or Enhanced mode of operation. The settings are Disabled, Compatible and Enhanced. Serial ATA Controller 1 This item specifies whether SATA Controller 1 is initialized in Compatible or Enhanced mode of operation. The settings are Disabled, Compatible and Enhanced.
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CT-61 Intel IGD SWSCI OpRegion Configuration DVMT/FIXED Memory Select DVMT/FIXED Mode Memory size used by internal Graphics Device. Options: 128MB, 256MB, Maximum. IGD – Boot Type Selects the Video Device(s) to be activated during POST. This option has no effect if external graphics present. Options: CRT, DVI, TV, CRT+DVI.
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USB Configuration Legacy USB Support Legacy USB Support refers to USB mouse and keyboard support. Normally if this option is not enabled, any attached USB mouse or keyboard will not become available until a USB compatible operating system is fully booted with all USB drivers loaded. When this option is enabled, any attached USB mouse or keyboard can control the system even when there is no USB driver loaded on the system. Set this value to enable or disable the Legacy USB Support.
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CT-61 Super IO Configuration Serial Port 1/2/4 Configuration Sub-menu allows you to Enable/Disable and set the parameters of Serial Ports 1, 2, 4.
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PC Health Configuration 54 BIOS Setup Utility
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CT-61 Console Redirection The settings specify how the host computer and the remote computer will exchange data. Both computers should have the same or compatible settings. The user can enable one serial port for Console Redirection. Only one port can be used for Console Redirection at any time.
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Terminal Type VT-UTF8 is the preferred terminal type for out-of-band management. The next best choice is VT100+ and then VT100. Options: VT100, VT100+, VT-UTF8, ASNI. Bits per Second Select the bit rate (bits/second) you want the serial port to use for console redirection. Options: 115200, 57600, 19200, 9600. Data Bits Select the data bits you want the serial port to use for console redirection. Set this value to 7 or 8. Parity Set this option to select Parity for console redirection.
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CT-61 8.4 Chipset Configuration Select the Chipset tab from the setup screen to enter the Chipset BIOS Setup screen. You can select any of Chipset BIOS Setup options by highlighting it using the < Arrow > keys. The Chipset BIOS Setup screen is shown below.
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Initial Graphic Adapter Allows you to select which graphics controller to use as the primary boot device. Configuration options: IGD, PCI/IGD, PCI/PEG, PEG/IGD, PEG/PCI. IGD Memory IGD shared memory size. Options: Disabled, 32M, 64M, 128M. PCH Configuration SMBus Controller The SMBus controller. Set this value to Enable/Disable. Azalia HD Audio The onboard HDA Controller. Set this value to Enable/Disable.
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CT-61 USB Configuration All USB Devices All USB Devices. Set this value to Enabled/Disabled. EHCI Controller 1 USB 2.0 (EHCI) support. Set this value to Enabled/Disabled. USB Port USB Port 0~7.Set this value to Enabled/Disabled.
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8.5 Boot Configuration Select the Boot tab from the setup screen to enter the Boot Configuration screen. You can select any of the items in the left frame of the screen to go to the sub menu for that item. You can display a Boot Configuration option by highlighting it using the < Arrow > keys. The Boot Configuration screen is shown below: Quiet Boot When this feature is enabled, the BIOS will display the OEM logo during the boot-up sequence, hiding normal POST messages.
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CT-61 Bootup Num-Lock This option sets the Num Lock status when the system is powered on. Setting it to On will turn on the Num Lock key when the system is booted up. Setting it to Off will not enable the Num Lock key on bootup. GateA20 Active Upon Request: GA20 can be disabled using BIOS services. Always: do not allow disabling GA20; this option is useful when any RT code is executed above 1MB. Interrupt 19 Capture Allows Option ROMs to trap Int 19. Set this value to Enabled or Disabled.
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8.6 Security Setup Administrator Password Use this option to set a password for administrators with full control of the BIOS setup utility. User Password Use this option to set a password for users with limited access to the BIOS setup utility.
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CT-61 8.7 Save & Exit Select the Save & Exit tab from the setup screen to enter the Save & Exit setup screen. You can display a Save & Exit BIOS setup option by highlighting it using the < Arrow > keys. The Save & Exit BIOS setup screen is shown below. Save Changes and Reset When you have completed the system configuration changes, select this option to leave Setup and reboot the computer so the new system configuration parameters can take effect.
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CT-61 9 IPMI User Guide 9.1 Introduction This chapter is written for those who already have a basic understanding of the newest implementation of the baseboard management controller (BMC) of the Intelligent Platform Management Interface (IPMI) specification rev. 2.0. It also describes the OEM extension IPMI command usages which are not listed in the IPMI specification. 9.2 Summary of Commands Supported by BMR-AVR-cPCI The table below lists all the commands supported by the BMR-AVR-cPCI.
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Command Broadcast “Get Device ID” IPMI Spec 20.9 NetFn CMD App Description This is a broadcast version of the ‘Get Device ID’ command that is provided for 01h the ‘discovery’ of Intelligent Devices on the IPMB IPMI Messaging Support Commands Send Message 22.7 App The Send Message command is used for bridging IPMI messages between 34h channels, and between the system management software (SMS) and a given channel. BMC Watchdog Timer Reset Watchdog Timer 27.5 App Set Watchdog Timer 27.
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CT-61 Command IPMI Spec NetFn CMD Description Sensor Device Commands Get Device SDR Info 35.2 S/E Get Device SDR 35.3 S/E Reserve Device SDR Repository 35.4 S/E Set Sensor Hysteresis 35.6 S/E Get Sensor Hysteresis 35.7 S/E 35.8 S/E 35.9 S/E Set Sensor Event Enable 35.10 S/E Get Sensor Event Enable 35.11 S/E Get Sensor Event Status 35.
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Command IPMI Spec NetFn CMD Get Sensor Reading 35.14 S/E Get Sensor Type 35.16 S/E FRU Device Commands Get FRU Inventory 34.1 Area Info Read FRU Data 34.2 Write FRU Data 34.3 68 Stora ge Stora ge Stora ge Description This command returns the present reading for sensor. The sensor device may return a stored version of a 2Dh periodically updated reading, or the sensor device may scan to obtain the reading after receiving the request.
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CT-61 9.
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OemRescanGaInput This command is used to rescan the geo-address input pins and reset the IPMB address according to the input value. Action Byte Value 0 C0h NetFn/LUN for OEM 1 22h OEM defined command Request Response Description 0 Complete Code 00h means OK 1 New IPMB address New IPMB address value OemTestFunction Internal test purposes only.
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CT-61 OemReportGeoAddress This command can report the IPMB address, the GA pin input status, and the event forwarding control value. Action Byte Value 0 C0h NetFn/LUN for OEM 1 F0h OEM defined command 0 Complete Code 00h means OK 1 IPMB address IPMB address value Request Response Description 2 GA value GA pin input status 3 Control value Current control value of event forwarding OemEnableSmbus This command is used to turn on the I2C bus when it is off during boot up process.
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OemDispDebugVariable This command can report up to 5 interval values for debug purposes. For developers only. Action Request Response Byte Value Description 0 C0h NetFn/LUN for OEM 1 F4h OEM defined command 0 Complete Code 00h means OK 1 *Debug variable 1 2 *Debug variable 2 3 *Debug variable 3 4 *Debug variable 4 5 *Debug variable 5 OemResetHost This command is implemented to control the system’s status if rebooting is required. Operators can control the system remotely.
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CT-61 OemPowerOn This command is implemented to control the system’s status if power-on is required. Operators can control the system remotely. Action Byte Value 0 C0h NetFn/LUN for OEM 1 F7h OEM defined command 0 Complete Code 00h means OK Request Response Description 9.4 CompactPCI Address Map Since more than one system may be installed in a single chassis, we allocate each IPMB address based on GA input as peripheral cards. The CompactPCI Peripheral Address Mapping Table is given below.
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9.5 Communications with IPMC Operating systems need to use a serial port to communicate with the IPMC. The resource setting of the serial port must be IO: 0x3E8 and IRQ: 3. The communication setting of the serial port must be BaudRate: 9600, DataBit: 8, ParityCheck: None, StopBit: 1, and FlowControl: None. In Windows XP, use “COM3” to communicate with the IPMC. 9.6 IPMI Sensors List Sensor Number Sensor name 00h BMC Watchdog 01h 3.3V Normal Reading 3.
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CT-61 Important Safety Instructions For user safety, please read and follow all instructions, WARNINGS, CAUTIONS, and NOTES marked in this manual and on the associated equipment before handling/operating the equipment. X Read these safety instructions carefully. X Keep this user’s manual for future reference. X Read the specifications section of this manual for detailed information on the operating environment of this equipment.
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X Never attempt to fix the equipment. Equipment should only be serviced by qualified personnel. A Lithium-type battery may be provided for uninterrupted, backup or emergency power. WARNING: X 76 Risk of explosion if battery is replaced with one of an incorrect type. Dispose of used batteries appropriately.
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CT-61 Getting Service Contact us should you require any service or assistance. ADLINK Technology, Inc. Address: 9F, No.166 Jian Yi Road, Zhonghe District New Taipei City 235, Taiwan ᄅ‫ؑק‬խࡉ೴৬ԫሁ 166 ᇆ 9 ᑔ Tel: +886-2-8226-5877 Fax: +886-2-8226-5717 Email: service@adlinktech.com Ampro ADLINK Technology, Inc. Address: 5215 Hellyer Avenue, #110 San Jose, CA 95138, USA Tel: +1-408-360-0200 Toll Free: +1-800-966-5200 (USA only) Fax: +1-408-360-0222 Email: info@adlinktech.com ADLINK Technology (China) Co., Ltd.
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ADLINK Technology, Inc. (French Liaison Office) Address: 6 allée de Londres, Immeuble Ceylan 91940 Les Ulis, France Tel: +33 (0) 1 60 12 35 66 Fax: +33 (0) 1 60 12 35 66 Email: france@adlinktech.com ADLINK Technology Japan Corporation Address: ͱ101-0045 ᵅҀ䛑गҷ⬄ऎ⼲⬄䤯‫ ⬎ފ‬3-7-4 ⼲⬄ 374 ɛɳ 4F KANDA374 Bldg. 4F, 3-7-4 Kanda Kajicho, Chiyoda-ku, Tokyo 101-0045, Japan Tel: +81-3-4455-3722 Fax: +81-3-5209-6013 Email: japan@adlinktech.com ADLINK Technology, Inc.