User`s manual

Backplane Overview 33
Note: Please refer the following table for the routing of the Bus
Mastering (REQ/GNT), IDSEL, PCI CLK, and Interrupt sig-
nals.
Note Please refer the following table for the routing of the
PXI_STAR addressing signals from the trigger slot to periph-
eral slots
IDSEL
REQ#
GNT#
PCI
CLK
PXI P1
Pin A3
PXI P1
Pin B3
PXI P1
Pin C3
PXI P1
Pin E3
Slot 1(SYS) - - - INTA# INTB# INTC# INTD#
Slot 2 AD31 0 6 INTD# INTA# INTB# INTC#
Slot 3 AD30 1 5 INTC# INTD# INTA# INTB#
Slot 4 AD29 2 1 INTB# INTC# INTD# INTA#
Slot 5 AD28 3 2 INTA# INTB# INTC# INTD#
Slot 6 AD27 4 3 INTD# INTA# INTB# INTC#
Slot 7 AD26 5 4 INTC# INTD# INTA# INTB#
Slot 8 AD25 6 0 INTB# INTC# INTB# INTA#
Table 3-8: Signal Routing
Physical Slot Number PXI_STAR (P2-D17)
Slot 2 (Star Trigger Slot) PXI_STAR0 - PXI_STAR5
Slot 3 PXI_STAR0
Slot 4 PXI_STAR1
Slot 5 PXI_STAR2
Slot 6 PXI_STAR3
Slot 7 PXI_STAR4
Slot 8 PXI_STAR5
Table 3-9: PXI_STAR Routing