Specifications

Chapter 2. Architecture and technical overview 115
When a system is idle, the system firmware will lower the frequency and voltage to power
energy saver mode values. When fully utilized, the maximum frequency will vary
depending on whether the user favors power savings or system performance. If an
administrator prefers energy savings and a system is fully utilized, the system is designed
to reduce the maximum frequency to 95% of nominal values. If performance is favored
over energy consumption, the maximum frequency can be increased to up to 109% of
nominal frequency for extra performance.
Dynamic power saver mode is mutually exclusive with power saver mode. Only one of
these modes can be enabled at a given time.
򐂰 Power capping
Power capping enforces a user-specified limit on power usage. Power capping is not a
power-saving mechanism. It enforces power caps by throttling the processors in the
system, degrading performance significantly. The idea of a power cap is to set a limit that
must never be reached but that frees up extra power never used in the data center. The
margined power is this amount of extra power that is allocated to a server during its
installation in a datacenter. It is based on the server environmental specifications that
usually are never reached because server specifications are always based on maximum
configurations and worst-case scenarios. The user must set and enable an energy cap
from the IBM Director Active Energy Manager user interface.
򐂰 Soft power capping
There are two power ranges into which the power cap can be set, power capping, as
described previously, and soft power capping. Soft power capping extends the allowed
energy capping range further, beyond a region that can be guaranteed in all configurations
and conditions. If the energy management goal is to meet a particular consumption limit,
then soft power capping is the mechanism to use.
򐂰 Processor core nap mode
The IBM POWER7 processor uses a low-power mode called nap that stops processor
execution when there is no work to do on that processor core. The latency of exiting nap
mode is very small, typically not generating any impact on applications running. Because
of that, the POWER Hypervisor™ can use nap mode as a general-purpose idle state.
When the operating system detects that a processor thread is idle, it yields control of a
hardware thread to the POWER Hypervisor. The POWER Hypervisor immediately puts
the thread into nap mode. Nap mode allows the hardware to turn the clock off on most of
the circuits inside the processor core. Reducing active energy consumption by turning off
the clocks allows the temperature to fall, which further reduces leakage (static) power of
the circuits causing a cumulative effect. Nap mode saves from 10 - 15% of power
consumption in the processor core.
򐂰 Processor core sleep mode
To be able to save even more energy, the POWER7 processor has an even lower power
mode called sleep. Before a core and its associated L2 and L3 caches enter sleep mode,
caches are flushed and transition lookaside buffers (TLB) are invalidated, and the
hardware clock is turned off in the core and in the caches. Voltage is reduced to minimize
leakage current. Processor cores inactive in the system (such as CoD processor cores)
are kept in Sleep mode. Sleep mode saves about 35% power consumption in the
processor core and associated L2 and L3 caches.
򐂰 Fan control and altitude input
System firmware will dynamically adjust fan speed based on energy consumption,
altitude, ambient temperature, and energy savings modes. Power Systems are designed
to operate in worst-case environments, in hot ambient temperatures, at high altitudes, and
with high power components. In a typical case, one or more of these constraints are not
valid. When no power savings setting is enabled, fan speed is based on ambient