User`s guide

Continuous Data Transfer in PCIS-DASK ? 39
5
Continuous Data Transfer in PCIS-DASK
The continuous data transfer functions in PCIS-DASK input or output blocks of data to or from a plug-in NuDAQ PCI
device. For input operations, PCIS-DASK must transfer the incoming data to a buffer in the computer memory. For
output operations, PCIS-DASK must transfer outgoing data from a buffer in the computer memory to the NuDAQ PCI
device. This chapter describes the mechanism and techniques that PCIS-DASK uses for continuous data transfer and
the considerations for selecting the continuous data transfer mode (sync. or async., double buffered or not, triggered or
non-triggered mode).
5.1 Continuous Data Transfer Mechanism
PCIS-DASK uses two mechanisms to perform the continuous data transfer. The first one, interrupt transfer, transfers
data through the interrupt mechanism. The second one is to use the DMA controller chip to perform a hardware transfer
of the data. Whether PCIS-DASK uses interrupt or DMA depends on the device. If the device support both of these two
mechanisms, PCIS-DASK decides on the data transfer method that typically takes maximum advantage of available
resources. For example, PCI-9112 supports interrupt and DMA for data transfers. The DMA data transfer is typically
faster, so PCIS-DASK takes advantage of it. PCI-9111 supports FIFO Half-Full and EOC interrupt transfer modes.
PCIS-DASK takes FIFO Half-Full interrupt transfer mode, because the CPU is interrupted do data transfer only when
the FIFO becomes half-full.