PCI-7200 / cPCI-7200 12MB/S High Speed Digital Input/ Output Card
@Copyright 1999 ADLink Technology Inc. All Rights Reserved. Manual Rev. 2.10: September 16, 1999 The information in this document is subject to change without prior notice in order to improve reliability, design and function and does not represent a commitment on the part of the manufacturer.
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CONTENTS CONTENTS ....................................................... i How to Use This Guide........................................ v CHAPTER 1 1.1 1.2 1.3 Applications ......................................................................2 Features.............................................................................2 Specifications....................................................................3 CHAPTER 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 Installation ....................................
CHAPTER 4 Operation Theorem ..................... 23 4.1 Direct Program Control ...................................................... 23 4.2 Timer Pacer Mode............................................................... 24 4.3 External Trigger .................................................................. 26 4.4 Handshaking....................................................................... 27 4.5 Timing Characteristic ......................................................... 29 CHAPTER 5 5.1 5.
5.26 5.27 5.28 5.29 _7200_DO_DMA_Status .................................................. 64 _7200_DO_DMA_Stop..................................................... 65 _7200_DI_Timer............................................................... 66 _7200_DO_Timer............................................................. 68 CHAPTER 6 Double Buffer Mode Principle...... 71 CHAPTER 7 Limitation .................................... 73 Appendix A. 8254 Programmable Interval Timer .. .....................
How to Use This Guide This manual is designed to help you use the PCI-7200 and cPCI-7200. The functionality of PCI-7200 and cPCI-7200 are the same except that cPCI-7200 has 4 auxiliary digital input and output. Therefore, the “PCI7200” represents both PCI-7200 and cPCI-7200 if not specified. The manual describes how to modify various settings on the PCI-7200 card to meet your requirements.
1 Introduction The PCI-7200/cPCI-7200 is PCI/CompactPCI form factor high speed digital I/O card, it consists of 32 digital input channels, and 32 digital output channels. High performance designs and the state-of-the-art technology make this card to be ideal for high speed digital input and output applications. The PCI-7200 performs high-speed data transfers using bus mastering DMA via 32-bit PCI bus architecture. The maximum data transfer rates can be up to 12MB per second.
Software Supporting: There are several software options help you get your applications running quickly and easily. 1. Linking with data acquisition software packages, such as: LabVIEW HP-VEE 2. Custom Program: For the customer writing their own programs, the PCI-7200 is supported by a comprehensive set of drivers and programming tools. These software supports are available in multiple platforms. • MS-DOS Borland C/C++ program library • DLL for Windows 95.
• 4 auxiliary digital input and output channels (cPCI-7200 only) • Diode terminators for 32 input channels and control signals (cPCI-7200 only) • Multiple interrupt sources are selectable by software 1.3 Specifications ♦ Digital I/O (DIO) • Channel: 32 TTL compatible inputs and outputs • Device: TTL74F273 and TTL74F373 • FIFO: 8 words (32-bit) (for PCI-7200) 2K + 8 words (32-bit) (for cPCI-7200) • Input Voltage: Low: Min. 0V; Max. 0.8V High: Min. +2.0V • Input Load: Low: +0.5V @ -0.6mA max. High: +2.
• Storage Temperature: -20° C ~ 80° C • Humidity: 5 ~ 95%, non-condensing • Connector: PCI-7200: one 37-pin D-type and one 40-pin ribbon connector cPCI-7200: one 100-pin SCSI-type connector • Dimension: PCI-7200: Compact size, only 98mm (H) X 147mm (L) cPCI-7200: Standard 3U CompactPCI form factor • Power Consumption: PCI-7200: +5 V @ 500 mA max. cPCI-7200: +5 V @ 600 mA max.
2 Installation This chapter describes how to install the PCI-7200. At first, the content of the package and the unpacking information that you should be careful are described. Because the PCI-7200 is a plug and play device, there is no more jumper or DIP switch setting for configuration. The Interrupt number and I/O port address are assigned by the system BIOS during system boot up. 2.
2.2 Unpacking Your PCI-7200 card contains sensitive electronic components that can be easily damaged by static electricity. The card should be done on a grounded anti-static mat. The operator should be wearing an anti-static wristband, grounded at the same point as the anti-static mat. Inspect the card module carton for obvious damage. Shipping and handling may cause damage to your module. Be sure there are no shipping and handling damages on the module before processing.
Choose the default option “Driver from disk provided by hardware manufacturer” and then a dialog box is shown to prompt you give the path of installation disk. Place ADLink’s “Manual & Software Utility” CD into the appropriate CD driver. Type “X:\Software\NuDAQPCI\7200\Win95” in the input field (X indicates the CD ROM driver) and then click OK. The system will start the installation of PCI-7200.
CN2 PCI-7200 Rev A1 Figure 2.1 PCI-7200 Layout Diagram 8 • Installation PCI -Bus Controller ALTERA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CN1 2.
Figure 2.
2.5 PCI-7200 Installation Outline 2.5.1 Hardware configuration Because PCI-7200 is a plug and play device, the interrupt number and I/O port address are assigned by system BIOS. There is no jumpers or DIP switches on-board for configuration setting. 2.5.2 Slot selection For PCI-7200, choose a PCI expansion slot and make sure this slot supports bus master mode data transfer.
2.5.4 Running the 7200UTIL.EXE The IRQ number and I/O port address can be configured by the system. By using the 7200UTIL.EXE, you can get the above values and they are displayed by this utility. A testing program is included in this utility, you can check if your PCI-7200 can work properly. Refer Section 5.2 for further detailed information. 2.6 Connector Pin Assignment 2.6.
DI 16 DI 17 DI 18 DI 19 DI 20 DI 21 DI 22 DI 23 DI 24 DI 25 DI 26 DI 27 DI 28 DI 29 DI 30 DI 31 +5V O_ACK O_REQ N/C 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 DO16 DO17 DO18 DO19 DO20 DO21 DO22 DO23 DO24 DO25 DO26 DO27 DO28 DO29 DO30 DO 31 GND O_TRG N/C N/C Figure 2.
2.6.
The internal timer/counter 8254 on the PCI-7200 is configured as above diagram (figure 2.4). User can use it to generate the timer pacer for both digital input and digital output trigger. The digital input timer pacer is from OUT0 (Timer 0), and the digital output timer pacer is from OUT1 (Timer 1). Besides, Timer 0 and Timer 2 can be cascaded together to generate more timer pacer frequency for digital input. Also, the Timer 2 can be cascaded with Timer 1 for digital output.
3 Register Structure & Format 3.1 I/O Registers Format The PCI-7200 occupies 8 consecutive 32-bit I/O addresses in the PC I/O address space and the cPCI-7200 occupies 9 consecutive 32-bit I/O addresses. Table 4.1 shows the I/O Map Address Base + 0 Base + 4 Base + 8 Base + C Base + 10 Base + 14 Base + 18 Base + 1C Base + 20 (cPCI-7200 only) Read Counter 0 Counter 1 Counter 2 --Digital Input Reg. Digital Output (Readback) DIO Status & Control INT Status & Control AUXDIO Reg.
3.2 Digital Input Register (BASE + 10) 32 digital input channels can be read from this register Address: BASE + 10 Attribute: READ Only Data Format: Byte Base +10 Base +11 Base +12 Base +13 7 DI7 DI15 DI23 DI31 6 DI6 DI14 DI22 DI30 5 DI5 DI13 DI21 DI29 4 DI4 DI12 DI20 DI28 3 DI3 DI11 DI19 DI27 2 1 DI2 DI10 DI18 DI26 0 DI1 DI9 DI17 DI25 DI0 DI8 DI16 DI24 3.
3.4 DIO Status & Control Register (BASE + 18) The data transfer mode of digital input is controlled and status is checked through this register.
1: I_TRG is Rising Edge Active 0: I_TRG is Falling Edge Active I_TRG: External Trigger Enable 1: Wait until I_TRG signal is active, digital input sampling will begin after a rising or falling edge of I_TRG is coming. 0: Start input sampling immediately (if input control register is set) DIN_EN: Digital Input Enable 1: Digital Input Enable 0: Digital Input Disabled, when this bit is set as 0, all digital input operation will be stopped.
O_TRG: Digital Output Trigger Signal This bit is used to control the O_TRG output of PCI-7200, the signal is on CN1 pin 36 of PCI-7200 or CN1 pin 26 of cPCI-7200 when 1: O_TRG 1 goes High (1) 0: O_TRG 1 goes Low (0) ♦ Digital I/O FIFO Status: I_OVR: Input data overrun 1: Digital Input FIFO is full (overrun) during input data transfer 0: No input data overrun occurred Input data overrun occurred, the I_OVR bit is set when input FIFO is full and there is new input data coming in.
♦ Interrupt Control: In PCI-7200, the interrupt can be triggered by many signal sources such as O_ACK, I_REQ, timer 0, timer 1, and timer 2. The interrupt source is controlled by the following bits: IO_ACK: Interrupt is triggered by O_ACK signal. 1: O_ACK interrupt is enabled 0: O_ACK interrupt is disabled II_REQ: Interrupt is triggered by I_REQ signal. 1: I_REQ interrupt is enabled 0: I_REQ interrupt is disabled T0_EN: Interrupt is triggered by timer 0 output.
SI_T0: Status of timer 0 interrupt 1: OUT0 (output of timer 0) Interrupt occurred 0: No timer 0 Interrupt SI_T1: Status of timer 1 interrupt 1: OUT1 (output of timer 1) Interrupt occurred 0: No timer 1 Interrupt SI_T2: Status of timer 2 interrupt 1: OUT2 (output of timer 2) interrupt occurred 0: No timer 2 Interrupt Note: All the interrupt status can be cleared by writing 1 to the corresponding bit of the register.
♦ I_REQ Polarity Selection: When the input sampling is controlled by the I_REQ signal only, the I_REQ can be programmed to be rising edge active or falling edge active. REQ_NEG: I_REQ trigger polarity 1: latch input data on falling edge of I_REQ 0: latch input data on rising edge of I_REQ ♦ FIFO Control and Status (cPCI-7200 only): The cPCI-7200 has an extra 2K samples digital input FIFO.
4 Operation Theorem In PCI-7200, there are four data transfer modes can be used for digital I/O access and control, these modes are: 1. Direct Program Control: the digital inputs and outputs can be read/written and controlled by its corresponding I/O port address directly. 2. Internal Timer Pacer Mode: the digital input and output operations are paced by internal timer pacer and transferred by bus mastering DMA. 3.
The digital OUT operation is: outport (BASE+14, 0xAAAAAAAA ) // (A : 0 ~ F) The digital IN operation is: value = inport (BASE+10) // The input status is save in the // value variable 4.2 Timer Pacer Mode The digital I/O access control is clocked by timer pacer, which is generated by a interval programming timer/counter chip 8254. There are three timers on the 8254. The timer 0 is used to generate timer pacer for digital input, and timer 1 is used for digital output.
The operation sequences are: 1. Define the frequency (timer pacer rate) 2. The digital input data are saved in FIFO after a timer pacer pulse is generated. The sampling is controlled by timer pacer. 3. The data saved in FIFO will be transferred to main memory of your computer system directly and automatically. This is controlled by bus mastering DMA control, this function is supported by PCI controller chip.
4.3 External Clock Mode The digital input is clocked by external strobe, which is from the Pin 19 (I_REQ) of CN2 (PCI-7200) or Pin 24 of CN1 (cPCI-7200). The operation sequence is very similar to Timer Pacer Trigger. The only difference is the clock source. 1. The external input strobe is generated from outside device, and go through the Pin 19 (I_REQ) of CN2 and to latch the digital input. 2. The digital input data are saved in FIFO after an I/O strobe signal is coming in. 3.
4.4 Handshaking In PCI-7200, it also supports a handshaking digital I/O transfer mode. That is, after input data is ready, an I_REQ is sent form external device, and I_ACK will go high to acknowledge the data already accessed. I_REQ & I_ACK for Digital Input 1. Digital Input Data is ready 2. An I_REQ signal is generated for digital input operation 3. Digital input data is saved to FIFO 4. An I_ACK signal is generated and sent to outside device 5.
O_REQ & O_ACK for Digital Output 1. Digital Output Data is moved from PC memory to FIFO of PCI7200 by using DMA data mastering data transfer. 2. Move output data from FIFO to digital output circuit. 3. Output data is ready. 4. An O_REQ signal is generated and sent to outside device. 5. After an O_ACK is got, the step 2 to step 5 will be repeated again. ** If the FIFO is not full, the output data is moved form PC‘s main memory to FIFO automatically.
4.5 Timing Characteristic 1. I_REQ as input data strobe (Rising Edge Active) th tl I_REQ IN_REQ t cyc valid data valid data DI0~DI31 ts tn th 60ns tl ts 2ns tn 60ns t cyc 5 PCI CLK Cycle 30ns 2.
3. I_REQ & I_ACK Handshaking t5 IN_REQ I_REQ t4 t3 IN_ACK I_ACK valid data valid data DI0~DI31 t1 t2 t1 0ns t5 60ns t2 0ns t4 1 PCI CLK Cycle t3 2 PCI CLK Cycle 4.
5. O_REQ & O_ACK Handshaking t3 OUT_REQ O_REQ t2 OUT_ACK O_ACK valid data valid data DO0~Do31 t1 t1 19ns t2 1 PCI CLK Cycle t3 5 PCI CLK Cycle Note: O_ACK must be de-asserted before O_REQ asserts, O_ACK can be asserted any time after O_REQ asserts, O_REQ will be reasserted after O_ACK is asserted.
5 C/C++ & DLL Libraries In this chapter, the PCI-7200's software drivers: C/C++ language library for DOS and DLL driver for Windows 95/98 are described. 5.1 Installation 5.1.1 Installation The Library & Utility supplied with PCI-7200 includes a utility software, C-language library, DLL libraries and some demonstration programs which can help you reduce programming work. ♦ MS-DOS Installation : 1. Turn your PC's power switch on 2. Put the ADLink’s “All-in-one” CD into the appropriate CD drive. 3.
♦ Windows 95/98 Installation: 1. Put the ADLink’s “All-in-one” CD into the appropriate CD drive. 2. If autorun setup program is not invoked automatically please execute X:\setup.exe. (X indicates the CD-ROM drive) 3. Select NuDAQ PCI >> Drivers >> Win 95/98 >> PCI-7200 to setup PCI-7200 DLL for Windows 95. After a welcome dialog box, Setup prompts the following dialog box for you to specify the destination directory. The default path is C:\ADLink\7200\W95.
5.2 Running Testing Utility (7200UTIL.EXE) After finishing the installation of PCI-7200 DOS software, you can execute the utility by the following commands under DOS environment: C> cd \ADLINK\7200\DOS\UTIL C> 7200UTIL The following diagram will be displayed on you screen. You can test the functionality : 1. Digital I/O in polling mode (Direct Program Control) 2. Digital I/O DMA mode (Timer Pacer Trigger and Bus-Mastering DMA data transfer) 3.
5.3 Software Driver Naming Convention The functions of PCI-7200's software drivers are using full-names to represent the functions' real meaning. The naming convention rules are : Ÿ DOS _{hardware_model}_{action_name}. e.g. _7200_Initial (). Ÿ Windows 95/98 In order to recognize the difference between DOS library and Windows library, A capital "W" is put on the head of each function name of the Windows DLL driver. e.g.
@ Syntax Visual C++ (Windows 95/98) int W_7200_Initial (U8 card_number, U16 *base_addresss, U8 *irq_no) Visual Basic (Windows 95/98) W_7200_Initial (ByVal card_number As Byte, base_addresss As Integer, irq_no As Byte) As Long C/C++ (DOS) int _7200_Initial (U8 card_number, U16 *base_addresss, *irq_no) U8 @ Argument card_number : the card number to be initialized, only four cards can be initialized, the card number must be CARD_1, CARD_2, CARD_3 or CARD_4.
5.5 _7200_Switch_Card_No @ Description After initialized more than one PCI-7200 cards, this function is used to select which card is used currently.
5.6 _7200_AUX_DI @ Description Read data from auxiliary digital input port of cPCI-7200 card. You can get all 4 bits input data by using this function. @ Syntax Visual C++ (Windows 95/98) int W_7200_AUX_DI (U32 *aux_di) Visual Basic (Windows 95/98) W_7200_DI (aux_di As Long) As Long C/C++ (DOS) int _7200_DI (U32 *aux_di) @ Argument aux_di : returns 4-bit value from auxiliary digital input port.
5.7 _7200_AUX_DI_Channel @ Description Read data from auxiliary digital input channel of cPCI-7200 card. There are 4 digital input channels on the cPCI-7200 auxiliary digital input port. When performs this function, the auxiliary digital input port is read and the value of the corresponding channel is returned. * channel means each bit of digital input port.
5.8 _7200_AUX_DO @ Description Write data to auxiliary digital output port. There are 4 auxiliary digital outputs on the cPCI-7200.
5.9 _7200_AUX_DO_Channel @ Description Write data to auxiliary digital output channel (bit). There are 4 auxiliary digital output channels on the cPCI-7200. When performs this function, the digital output data is written to the corresponding channel.
5.10 _7200_DI @ Description This function is used to read data from digital input port. There are 32-bit digital inputs on the PCI-7200. You can get all 32 input data from _7200_DI by using this function. @ Syntax Visual C++ (Windows 95/98) int W_7200_DI (U32 *di_data) Visual Basic (Windows 95/98) W_7200_DI (di_data As Long) As Long C/C++ (DOS) int _7200_DI (U32 *di_data) @ Argument di_data : returns all 32-bit value from digital port.
5.11 _7200_DI_Channel @ Description This function is used to read data from digital input channels (bit). There are 32 digital input channels on the PCI-7200. When performs this function, the digital input port is read and the value of the corresponding channel is returned. * channel means each bit of digital input port.
5.12 _7200_DO @ Description This function is used to write data to digital output port. There are 32 digital outputs on the PCI-7200.
5.13 _7200_DO_Channel @ Description This function is used to write data to digital output channels (bit). There are 32 digital output channels on the PCI-7200. When performs this function, the digital output data is written to the corresponding channel.
5.14 _7200_Alloc_DMA_Mem @ Description Contact Windows 95/98 system to allocate a block of contiguous memory for single-buffered DMA transfer. This function is only available in Windows 95/98 version.
actual_size: The actual size system allocate for DMA memory. The unit is BYTE. If system is not able to get a block of contiguous memory of specified buf_size, it will allocate a block of memory as large as it can. In this case, this function returns ERR_SmallerDMAMemAllocated, and actual_size denotes the actual size of allocated memory.
5.15 _7200_Free_DMA_Mem @ Description Deallocate a system DMA memory under Windows 95/98 environment. This function is only available in Windows 95/98 version. @ Syntax Visual C++ (Windows 95/98) int W_7200_Free_DMA_Mem (U32 handle) Visual Basic (Windows 95/98) W_7200_Free_DMA_Mem (ByVal handle As Long ) As Long @ Argument handle: The handle of system DMA memory to deallocate.
5.16 _7200_Alloc_DBDMA_Mem @ Description Contact Windows 95/98 system to allocate a block of contiguous memory as circular buffer for double-buffered DMA DI transfer. This function is only available in Windows 95/98 version. For double-buffered transfer principle, please refer to Section 6 “Double Buffered Mode Principle”.
5.17 _7200_Free_DBDMA_Mem @ Description Deallocate a system circular buffer DMA memory under Windows 95/98 environment. This function is only available in Windows 95/98 version. For double-buffered transfer principle, please refer to Section 6 “Double Buffered Mode Principle”. @ Syntax Visual C++ (Windows 95/98) int W_7200_Free_DBDMA_Mem (U32 handle) Visual Basic (Windows 95/98) W_7200_Free_DBDMA_Mem (ByVal handle As Long ) As Long @ Argument handle: The handle of system DMA memory to deallocate.
5.18 _7200_DI_DMA_Start @ Description The function will perform digital input N times with DMA data transfer by using one of the following four sampling modes : 1. pacer trigger (internal timer trigger) 2. external rising edge I_IRQ 3. external falling edge I_IRQ 4. I_REQ & I_ACK handshaking It will take place in the background which will not stop until the Nth input data is transferred or your program execute _7200_DI_DMA_Stop function to stop the process.
2. Load the PCI controller with the count and 32-bit physical address of the start of previously allocated destination memory which will accept data. This count is the number of bytes (not long words!) transferred during the bus master operation and can be a large number up to 64 million (2^26) bytes. Since the PCI-7200 transfers are always long words, this is 16 million long words (2^24). 3. After the input sampling is started, the input data is stored in the FIFO of PCI controller.
@ Syntax Visual C++ (Windows 95/98) int W_7200_DI_DMA_Start (U8 mode, U32 count, U32 handle, Boolean wait_trg, U8 trg_pol, Boolean clear_fifo, Boolean disable_di) Visual Basic (Windows 95/98) W_7200_DI_DMA_Start (ByVal mode As Byte, ByVal count As Long, ByVal handle As Long, ByVal wait_trg as Byte, ByVal trg_pol As Byte, ByVal clear_fifo As Byte, ByVal disable_di As Byte) As Long C/C++ (DOS) int _7200_DI_DMA_Start (U8 mode, U32 count, U32 *di_buffer, Boolean wait_trig, U8 trig_pol, Boolean clear_fifo, Boole
di_buffer (DOS): If double buffer mode is disabled, this is the start address of the memory buffer to store the DI data. If double buffer mode is enabled, this memory buffer is actually of no use. But the buffer size still must be larger than the number of count (that is, count*4 bytes). You can use this buffer as transfer buffer in _7200_DblBufferTransfer to make use of this buffer. **This memory should be double-word alignment.
5.19 _7200_DI_DMA_Status @ Description Since the _7200_DI_DMA_Start function is executed in background, you can issue this function to check its operation status. This function only works when double-buffer mode is set as disable.
5.20 _7200_DI_DMA_Stop @ Description This function is used to stop the DMA data transferring. After executing this function, the _7200_DI_DMA_Start function is stopped. The function returns the number of the data which has been transferred, no matter if the digital input DMA data transfer is stopped by this function or by the DMA terminal count ISR.
5.21 _7200_DblBufferMode @ Description This function is used to enable or disable double buffer mode for DMA DI operation.
5.22 _7200_CheckHalfReady @ Description When you use _7200_DI_DMA_Start to sample digital input data and double buffer mode is set as enable. You must use _7200_CheckHalfReady to check data ready (data half full) or not in the circular buffer, and using _7200_DblBufferTransfer to get data.
5.23 _7200_DblBufferTransfer @ Description Using this function to copy the input data in the circular buffer to the transfer buffer. It copies half of the circular buffer, either first half or second half, to the transfer buffer.
5.24 _7200_GetOverrunStatus @ Description When you use _7200_DI_DMA_Start to convert Digital I/O data with double buffer mode enabled, and if you do not use _7200_DblBufferTransfer to move converted data then the double buffer overrun will occur, using this function to check overrun count.
5.25 _7200_DO_DMA_Start @ Description The function will perform digital output N times with DMA data transfer by using the following four sampling modes : 1. pacer trigger (internal timer trigger, TIME 1) 2. Internal timer pacer with O_REQ enable 3. O_REQ & O_ACK handshaking It will takes place in the background which will not be stop until the Nth conversion has been completed or your program execute _7200_DO_DMA_Stop function to stop the process.
handle (Win 95/98): the handle of system DMA memory. In Windows 95 environment, before calling W_7200_DO_DMA_Start, W_7200_Alloc_DMA_Mem must be called to allocate a contiguous DMA memory and get the handle of it. Also W_7200_Alloc_DMA_Mem will attach a buffer to DMA memory. The DO data is stored in the buffer attached to this handle. do_buffer (DOS) : the start address of the memory buffer to store the DO data.
5.26 _7200_DO_DMA_Status @ Description Since the _7200_DO_DMA_Start function is executed in background, you can issue the function _7200_DO_DMA_Status to check its operation status.
5.27 _7200_DO_DMA_Stop @ Description This function is used to stop the DMA DO operation. After executing this function, the _7200_DO_DMA_Start function is stopped. The function returns the number of the data which has been transferred, no matter if the digital output DMA data transfer is stopped by this function or by the DMA terminal count ISR.
5.28 _7200_DI_Timer @ Description This function is used to set the internal timer pacer for digital input. There are two configuration for the internal timer pacer : 1. Non-cascaded (One COUNTER 0 only) 8254 Timer/Counter 4MHz Input Counter 0 CLK0 GATE0 OUT0 Digital Input Trigger Timer pacer frequency = 4Mhz / C0 2.
C/C++ (DOS) int _7200_DI_Timer (U16 c0, U16 c2, Boolean mode) @ Argument c0 : c2 : mode : frequency divider of Counter #0. Valid value ranges from 2 to 65535. frequency divider of Counter #2. Valid value ranges from 2 to 65535.
5.29 _7200_DO_Timer @ Description This function is used to set the internal timer pacer for digital output. There are two configuration for the internal timer pacer : 1. Non-cascaded (One COUNTER 0 only) 8254 Timer/Counter 4MHz Input Counter 1 CLK0 GATE0 OUT0 Digital Output Trigger Timer pacer frequency = 4Mhz / C1 2.
C/C++ (DOS) int _7200_DO_Timer (U16 c1, U16 c2, Boolean mode) @ Argument c1 : c2 : mode : frequency divider of Counter #1 frequency divider of Counter #2 TIMER_NONCASCADE or TIMER_CASCADE @ Return Code ERR_NoError ERR_InvalidBoardNumber ERR_InvalidTimerMode ERR_BoardNoInit C/C++ & DLL Libraries • 69
6 Double Buffer Mode Principle The data buffer for double-buffered DMA DI operation is a circular buffer logically. It logically divided into two equal halves. The double-buffered DI begins when device starts writing data into the first half of the circular buffer (Figure 6-1a). After device begins writing to the second half of the circular buffer, you can copy the data from the first half into the transfer buffer (Figure 61b).
a Incoming DMA input data b Circular Buffer > > > > > > Transfer Buffer c d > > > > Empty Buffer Untransferred Data Transferred Data Figure 6-1 The PCI-7200 double buffer mode functions were designed according to the principle described above. If you use _7200_DblBufferMode() to enable double buffer mode, the following _7200_DI_DMA_Start() will perform double-buffered DMA DI.
7 Limitation 1. The 12 MB/sec data transfer rate can only be possibly achieved in a system in which the PCI-7200 card is the only device using the bus, but the speed can not be guaranteed due to the limited FIFO depth. 2. PCI-7200 supports three input clock modes, internal clock, external clock, and handshaking modes. The first two modes cannot guarantee the input data integrity in high speed data rate because of the limited FIFO depth and the PCI-bus latency variation.
Appendix A. 8254 Programmable Interval Timer Note : The material of this section is adopted from “Intel Microprocessor and Peripheral Handbook Vol. II --Peripheral” A.1 The Intel (NEC) 8254 The Intel (NEC) 8254 contains three independent, programmable, multi-mode 16 bit counter/timers. The three independent 16 bit counters can be clocked at rates from DC to 5 MHz. Each counter can be individually programmed with 6 different operating modes by appropriately formatted control words.
A.2 The Control Byte The 8254 occupies 8 I/O address locations in the PCI-7200 I/O map. As shown below. Base + 0 Base + 4 Base + 8 Base + C LSB OR MSB OF COUNTER 0 LSB OR MSB OF COUNTER 1 LSB OR MSB OF COUNTER 2 CONTROL BYTE for Chip 0 Before loading or reading any of these individual counters, the control byte (Base + C) must be loaded first.
• M2, M1 & M0 - Select Operating Mode (Bit 3, Bit 2, & Bit 1) M2 0 0 x x 1 1 M1 0 0 1 1 0 0 M0 0 1 0 1 0 1 MODE 0 1 2 3 4 5 • BCD - Select Binary/BCD Counting (Bit 0) 0 1 BINARY COUNTER 16-BITS BINARY CODED DECIMAL (BCD) COUNTER (4 DECADES) Note: 1. The count of the binary counter is from 0 up to 65,535. 2. The count of the BCD counter is from 0 up to 99,999. A.3 Mode Definition In 8254, there are six different operating modes can be selected.
Rewriting a counter register during counting results in the following: (1) Write 1st byte stops the current counting. (2) Write 2nd byte starts the new count. • Mode 1 : Programmable One-Shot. The output will go low on the count following the rising edge of the gate input. The output will go high on the terminal count. If a new count value is loaded while the output is low it will not affect the duration of the one-shot pulse until the succeeding trigger.
• Mode 3 : Square Wave Rate Generator. Similar to MODE 2 except that the output will remain high until one half the count has been completed (or even numbers) and go low for the other half of the count. This is accomplished by decrement the counter by two on the falling edge of each clock pulse. When the counter reaches terminal count, the state of the output is changed and the counter is reloaded with the full count and the whole process is repeated.
• Mode 5 : Hardware Triggered Strobe. The counter will start counting after the rising edge of the trigger input and will go low for one clock period when the terminal count is reached. The counter is re-triggerable. the output will not go low until the full count after the rising edge of any trigger. The detailed description of the mode of 8254, please refer the Intel Microsystem Components Handbook.
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