User`s guide

Appendix A • 53
SEL Device Commands
Get SEL Info √(1)
Get SEL Allocation Info √(1)
Reserve SEL √(1)
Get SEL Entry √(1)
Add SEL Entry √(1)
Partial Add SEL Entry √(1)
Delete SEL Entry (3)
Clear SEL √(1)
Get SEL Time √(1)
Set SEL Time √(1)
(1) Supported on PCB rev.A3 or higher.
(2) The SDR information are read only.
(3) The SEL storage is not supported random access
Not available yet means an addition on-board EEPROM to store information.
This requires a re-spin of A3 version board. The A2 version board does not
have the EEPROM.
A.2 IPMI Address Map
The IPMI address of the SBC is defined by GA pins which is relative with the
physical slot the SBC is installed. The following table shows the relationship
between the IPMI address and the Slot number SBC installed.
Address (Hex) CompactPCI Slot
B0 Peripheral Slot1
B2 Peripheral Slot2
B4 Peripheral Slot3
B6 Peripheral Slot4
B8 Peripheral Slot5
BA Peripheral Slot6
BC Peripheral Slot7