User`s guide

6 • Introduction
Key features
• Large 1K Byte total buffering supporting concurrent Primary and
Secondary operation as well as traffic isolation.
• Multiple output clock pins and 9 pairs of REQ/GNT signals support up to 9
bus masters directly on secondary bus without external clock buffer and
bus arbiter.
• 5V tolerant I/O buffer, EEPROM support for extra register control, Vital
Product Data (VPD), 16 general purpose IO interface, and proven PME
• D3 wakeup power management is part of the large array of functionalities
available in a single HB6 bridge.
1.3.3 BIOS
The cPCI-6810/6820 adopts the Award BIOS with a 4-Mbit flash ROM
implemented to load the BIOS. A boot block device is used to allow recovery
of the BIOS in the event of a catastrophic failure (power fail during BIOS
update). The BIOS support the following features:
• CPU/memory speed auto-detection
• DMI BIOS Support: Desktop Management Interface (DMI) allows users to
download system hardware-level information such as CPU type, CPU
internal/external frequencies and memory size.
• Green Function: APM/ACPI compliant Power management via BIOS,
activated through mouse/keyboard movement or other wake-up events.
• PCI Plug-and-Play support.
• Intel pre-boot execution environment (PXE) support
• PICMG2.1 CompactPCI hot-swap specification Rev. 1.0 support on
CompactPCI I/O bus.