User`s guide

Operation Theory • 57
4.5.2.4 High-Hysteresis analog trigger condition
Figure 43 shows the high-hysteresis analog trigger condition, the trigger
signal is generated when the input analog signal level is greater than the
High_Threshold voltage, and the Low_Threshold voltage determines the
hysteresis duration.
Figure 43: High-Hysteresis analog trigger condition
4.5.2.5 Low-Hysteresis analog trigger condition
Figure 44 shows the low-hysteresis analog trigger condition, the trigger
signal is generated when the input analog signal level is less than the
Low_Threshold voltage, and the High_Threshold voltage determines the
hysteresis duration.
Figure 44: Low-Hysteresis analog trigger condition