User`s guide

Operation Theory • 37

Delay Trigger Acquisition

Use delay trigger acquisition in applications where you want to delay the

data collecting process after the occurrence of a specified trigger event.

The delay time is controlled by the value, which is pre-loaded in the De-

lay_counter (16bit). The counter counts down on the rising edge of the

Delay_counter clock source after the trigger condition is met. The clock

source is software programmed and can be either the Timebase clock

(40MHz) or the A/D sampling clock (Timebase /SI2_counter). When the

count reaches 0, the counter stops and the board starts to acquire data.

The total acquired data length = NumChan_counter * PSC_counter.

(NumChan _Counter=4, PSC_Counter=3)

Acquisition_in_progress

Scan_start

AD_conversion

Scan_in_progress

(SSHOUT)(pin8 on CN2)

Acquired & stored data

(3 scans)

Operat

ion start

Trigger

Delay until

Delay_Counter

reaches 0

Figure 19: Delay trigger

Note: When the Delay_counter clock source is set to Timebase, the

maximum delay time = 2

/40M s = 1.638ms, and when set to A/D

sampling clock, the maximum delay time can be higher (2

SI2_counter / 40M ).

Post-Trigger or Delay-trigger Acquisition with retrigger

Use post-trigger or delay-trigger acquisition with re-trigger function in ap-

plications where you want to collect data after several trigger events. The

number of scans after each trigger is specified in PSC_counter, and users

could program Retrig_no to specify the re-trigger numbers. Fig 20 illus-

trates an example. In this example, 2 scans of data is acquired after the

first trigger signal, then the board waits for the re-trigger signal (re-trigger

signals which occur before the first 2 scans of data acquired will be ig-

nored). When the re-trigger signal occurs, the board scans 2 more scans of