User`s guide

30 • Registers
3.14 Timer/Counter Register
Each 82C54 chip occupies 4 I/O address locations on the PCI-9111 as shown
below. Users may refer to the 82C54 data sheet for further descriptions of the
82C54. You can download the data sheet at the following web sites:
“http://support.intel.com/support/controllers/peripheral/231164.htm ” or
“http://www.tundra.com/”
Address: BASE + 40h ~ BASE + 46h
Attribute: read / write
Data Format:
Base + 40h Counter 0 Register (R/W)
Base + 42h Counter 1 Register (R/W)
Base + 44h Counter 2 Register (R/W)
Base + 46h 8254 CONTROL BYTE (W)
3.15 D/A Output Register
The D/A converter converts digital output data to an analog signal.
Address: BASE + 0
Attribute: write only
Data Format: (for D/A Channel 1)
Bit 7 6 5 4 3 2 1 0
Base + 0 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
Base + 1 --- --- --- --- DA11 DA10 DA9 DA8
DA0 is the LSB and DA11 is the MSB of the 12 bits data.
---: Don’t care