User`s guide

Registers • 21
3.2 I/O Address Map
Most of the PCI-9111 registers are 16 bits. Users can access these registers
using 16 bits I/O instructions. The following table shows the registers map,
including descriptions and their offset addresses relative to the base address.
I/O Address Write
Read
Base + 00h DA value AD FIFO value
Base + 02h Digital Output Digital Input
Base + 04h Extended DO Extended DI
Base + 06h AD channel control AD channel read back
Base + 08h AD range control
AD range and AD status
read back
Base + 0Ah AD trigger mode
AD mode and interrupt
setting read back
Base + 0Ch Interrupt control
ISC2 & Trigger even read
back*
1)
Base + 0Eh Software AD trigger (Not used)
Base + 10h ~3Eh Reserved
Base + 40h Timer 8254 Ch#0
Base + 42h Timer 8254 Ch#1
Base + 44h Timer 8254 Ch#2
Base + 46h Timer Control Timer Status
Base + 48h Clear H/W IRQ (Not used)
Table 1: I/O Address Map
*
1)
This register is only supported with the PCI-9111DG/HR hardware revision
B2.