User`s manual
Table Of Contents
- Table of Contents
- List of Tables
- List of Figures
- 1 Introduction
- 2 Installation
- 3 Signal Connections
- 4 Operation Theory
- 5 Calibration
- Appendix
- Warranty Policy

24 Operation Theory
Figure 4-4: Post trigger with retrigger
Bus-mastering DMA Data Transfer
Bus Mastering DMA Mode
In order to utilize the maximum PCI bandwidth, PCI bus-mas-
tering DMA is used for high speed DAQ boards. The bus-mas-
tering capability of the PLX PCI controller, takes over the PCI
bus when it becomes the master. Bus mastering reduces the
required size of on-board memory as well as CPU loading
since data is directly transferred to the host PC’s memory with-
out CPU intervention.
The hardware temporarily stores the acquired data in the
onboard Data FIFO buffer, then transfers the data to the user-
defined DMA buffer in the host PC’s memory. Bus-mastering
DMA utilizes the fastest available transfer rate of PCI-bus.
Once the analog acquisition operation starts, control returns to
your program.
The DMA transfer mode is very complex to program. We rec-
ommend using a high-level program library to configure this
card. If users would like to program the software that can han-
dle DMA data transfer, please refer to http://www.plxtech.com
for more information on PCI controllers.