User`s guide

30 • Registers
softconv (bit10): ADC direct conversion control
1: generate 1 convert pulse
0: no effect
ACQ_EN (bit9): Acquisition enable bit
1: enable the acquisition timing
0: disable the acquisition timing
M_enable (bit8): M counter enable bit
1: ignore trigger signals before M counter reaches 0
0: accept the trigger signal anytime
Retrig (bit7): Re-triggerability in an acquisition
1: Re-triggerable
0: trigger only once
DLY SRC (bit6): Delay time unit in delay trigger mode
1: delay in sampling rate (SI2)
0: delay in Timebase
TimeBase(bit5) : The Timebase Selection of 9116 series
1: External Timebase
0: Internal Timebase (24 MHz)
TrgP (bit4): The Trigger polarity selection bit
1: Negative Edge Trigger
0: Positive Edge Trigger
MODE2 ~ 0(bit3 ~ bit1): Trigger Mode Selection Bits
MODE2 MODE1 MODE0 Description
0 0 0 Software Trigger
0 0 1 Post Trigger
0 1 0 Delay Trigger
0 1 1 Pre Trigger
1 0 0 Middle Trigger
Table 15. Trigger Mode Selection Bits