User`s guide

24 Registers
4.6 Channel Gain Queue Register
This register is used to fill the Channel Gain Queue. We recommend users use
our call function to avoid any possible errors from these settings.
Address: BASE + 0x24
Attribute: write
Data Format:
Bit 7 6 5 4 3 2 1 0
EN3 EN2 EN1 EN0 HL_sel
UNIP DIFF U_CMMD
Bit 15 14 13 12 11 10 9 8
--- --- Gain1 Gain0
CH3 CH2 CH1 CH0
Bit 23 22 21 20 19 18 17 16
--- --- --- --- --- --- --- ---
Bit 31 30 29 28 27 26 25 24
--- --- --- --- --- --- --- ---
Table 8. Channel Gain Queue Register
CH3 ~ CH0 (bit11~ bit8): Internal A/D Channel selection bits
EN3 ~ EN0 (bit7~ bit4): Multiplexer Enable selection bits
Gain1~Gain0 (bit13~bit12): Gain selection bits
Gain1 Gain0 Gain
0 0 1
0 1 2
1 0 4
1 1 8
Table 9. Gain Selection Bits