User`s guide

Registers • 23
Clk_src (bit3): GPTC0’s clock source
1: External Input (Pin 96)
0: Internal Timebase
MODE1~MODE0 (bit1 ~ bit0): GPTC0’s Mode selection
MODE1 MODE0 Description
0 0 General Counter
0 1 Pulse Generation
1 0 X
1 1 X
Table 6. GPTC0’s Mode selection
4.5 A/D Data Registers
The digital converted data is 16-bits and is stored into 32-bit registers.
Address: BASE +24
Attribute: read
Data Format:
Bit 7 6 5 4 3 2 1 0
AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
Bit 15 14 13 12 11 10 9 8
AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8
Bit 23 22 21 20 19 18 17 16
--- --- --- --- --- --- --- ---
Bit 31 30 29 28 27 26 25 24
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Table 7. A/D Data Registers
AD15 ~ AD0: Analog to digital data. AD15 is the Most Significant Bit (MSB).
AD0 is the Least Significant Bit (LSB).