User`s guide

Watchdog and Utilities • 41
6. The peripheral board logic ground is discharged to chassis ground
through a bleed resistor.
7. The bleed resistor breaks contact with chassis ground. Logic ground
is again isolated.
8. The front panel makes low resistance contact with chassis ground
through the card guide.
9. The peripheral board contacts long pins on backplane, and begins to
contact ground, +5V, +3V, and V(I/O) pins.
10. The peripheral board is in an unstable state while pins are first mated.
This duration can potentially be infinite if the board is just marginally
connecting the longest pins.
11. Enough pins are connected that a stable early power can be
achieved. Hardware puts the Hot Swap (blue) LED on the peripheral
board to the ON state.
12. The peripheral board contacts the medium length pins on the
backplane. The peripheral board is now receiving the PCI clock.
13. The peripheral board contacts the short BD_SEL# pin. This pin is
grounded on the backplane and pulled high by a pull-up resistor on
the peripheral board. Its assertion indicates that the peripheral board
has been fully inserted into the backplane.
Extraction Process:
1. The peripheral board is installed.
2. The operator starts to withdraw the peripheral board.
3. The BD_SEL# pin disconnects. The hardware connection layer turns
on the blue LED if it hasn’t been turned on by software.
4. Medium length CompactPCI pins disengage.
5. Long length CompactPCI pins disengage. Early power goes away.
The peripheral board is in an unstable state while pins are first