User`s guide

56 Appendix B
B
Appendix B
B.1 21555 Application Notes
The cPCI-6765 incorporates an INTEL 21555 Non-transparent PCI-to-PCI
Bridge to operate at peripheral mode. As a peripheral card, it is recognized
as a device on the host bus as well as the local side. So an extra device
driver is needed to make it work. This is the most important feature. In
order to map two separated memory spaces so it implements two sets of
type 0 PCI BARs plus some CSRs. Other different features are listed in the
table below:
Items Non-transparent PPB Traditional PPB
Address
Decode
Base address registers (BARs)
are used to define independent
downstream and upstream
forwarding windows.
PPB base and limit
address registers are
used to define
downstream
forwarding windows.
Address
translation
Supported for both memory and
I/O transactions.
None.
Configuration
Downstream devices are not
visible to host.
Does not require hierarchical
configuration code (Type 0
configuration header).
Does not respond to Type 1
configuration transactions.
Supports configuration access
from the secondary bus.
Implements separate set of
configuration registers for the
secondary interface.
Downstream
devices are visible
to host.
Requires
hierarchical
configuration code
(Type 1
configuration
header).
Forwards and
converts Type 1
configuration
transactions.