Specifications

Jumpers and Connectors 35
cPCI-6840
JP3: Clear CMOS
The CMOS RAM stores the real time clock (RTC) information,
BIOS configuration, and default BIOS setting. The CMOS is
powered by the button cell battery when the system is power
off.
Please follow the following steps to erase the CMOS RAM
data:
1. Unplug the SBC from system
2. Short pins 2 and 3 of JP3, then reinstall the jumper to
normal location
3. Insert the SBC back to the chassis.
Miniature Switch on the Front Panel Lower Ejector:
The miniature switch is designed for power control and
hot-swap control. When the cPCI-6840 is plugged into system
slot, the whole system will not be powered up until the lower
ejector is closed. It will issue a power button signal when users
open the lower ejector. When the cPCI-6840 is plugged into a
peripheral slot, the entire system will not be powered up until
the lower ejector is closed and it will send out an ENUM# signal
to the system to indicate that a board has been plugged into
the CompactPCI backplane. When the lower ejector is opened,
the cPCI-6840 will send out an ENUM# to the system and wait
for the command from system.
Status JP3
Normal operation (Default)
Clear CMOS
Table 2-4: JP3 Settings
1 2 3
1 2 3
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