User`s guide
Registers Format 29
3.13 Digital I/O register
There are 16 digital input channels and 16 digital output channels are
provided by the ACL-8312/16. The address Base + 14 and Base + 15 are
used for both digital input and digital output control.
Address : BASE + 14 & BASE + 15
Attribute: read only
Data Format:
Address : BASE + 14 & BASE + 15
Attribute: write only
Data Format:
Bit 15 14 13 12 11 10 9 8
DO15 DO14 DO13 DO12 DO11 DO10 DO9 DO8
Bit 7 6 5 4 3 2 1 0
DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0
3.14 Internal Timer/Counter Register
Two counters of 8254 are used for periodically triggering the A/D
conversion, the remainder is free for user’s applications. The 8254
occupies 4 I/O address locations in the ACL-8316/12 as shown blow.
Users can refer to Tundra’s or Intel's data sheet (“http://www.tundra.com”
or “http://support.intel.com/support/controllers/peripheral/231164.htm”) for
a fully description of the 8254 features. Condensed information is
specified in section 4.5 Timer/Counter Operation.
Address : BASE + 0 ~ BASE + 3
Attribute: read / write
Data Format:
Base + 0 Counter 0 Register ( R/W)
Base + 1 Counter 1 Register ( R/W)
Base + 2 Counter 2 Register ( R/W)
Base + 3 8254 CONTROL BYTE( W)
Bit 15 14 13 12 11 10 9 8
DI15 DI14 DI13 DI12 DI11 DI10 DI9 DI8
Bit 7 6 5 4 3 2 1 0
DI7 DI6 DI5 DI4 DI3 DI2 DI1 DI0