User`s guide

20  Registers Format
3
Registers Format
The detailed description of the ACL-8316/12‘s register format is specified in
this chapter. This information is quite useful for the programmer who wish to
handle the ACL-8316/12 card by low-level program.
3.1 I/O Port Address
The ACL-8316 requires 16 consecutive addresses in the PC I/O address
space. Table 3.1 shows the I/O address of each register with respect to the
base address. The function of each register will be introduced in the following
sections.
Location Read Write
Base + 0 Counter 0 Counter 0
Base + 1 Counter 1 Counter 1
Base + 2 Counter 2 Counter 2
Base + 3 Counter Status Counter Control
Base + 4 A/D Data D/A Channel #1
Base + 5 -- --
Base + 6 A/D Data (FIFO) D/A Channel #2
Base + 7 -- --
Base + 8 A/D Channel and Status FIFO Enable
Base + 9 Clear Interrupt Request Gain Control
Base + 10 Software A/D trigger Channel MUX
Base + 11 Interrupt Source Setting Interrupt Source Control
Base + 12 A/D Mode Setting A/D Mode Control
Base + 13 D/A Mode and FIFO setting D/A Mode Control
Base + 14 DI (0...16) DO (0...16)
Base + 15 -- --
Table 3.1. I/O address map of the ACL-8316/12