User`s guide

12  Installation
JP5
BI1
UP1
JP5
BI1
UP1
D/A CH1 Output
-10V~+10V
Bipolar
(Default)
D/A CH1 Output
0V~10V
Unipolar
Figure 2.4 D/A CH1 Output Range setting
JP6
BI2
UP2
JP6
BI2
UP2
D/A CH2 Output
-10V~+10V
Bipolar
(Default)
D/A CH2 Output
0V~10V
Unipolar
Figure 2.5 D/A CH2 Output Range setting
2.7.2 Output Mode Setting
The ACL-8316/12 consists of two independently addressable latched in two
ranks for each D/A converter. The first rank consists of one 12-bit input latch
which can be loaded from the PC bus. The input latch holds data temporarily
before it is load into the second latch, the D/A latch. This double buffered
organization permits simultaneously update of all D/As.
On the other hands, if you do not need to latch D/A output by double buffered
mode. The transparency mode can driver the D/A output immediately
without waiting for the second latch. The configuration for either double
buffered mode or transparent mode is set by jumper JP8 and is shown on
Figure 2.6 below.