User`s guide

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Operation Theorem
optimize the DAS system. Refer to section 4.1.3 for data transfer
modes.
4.1.2 A/D Clock Sources (Trigger Modes)
In the ACL-8111, two Internal or one external clock sources can trigger
A/D conversion. The two internal sources are the software trigger and
the timer pacer trigger, which is controlled by the A/D operation mode
control register (BASE+11). The A/D operation modes combine the AD
clock sources and the data transfer mode together. Please also refer
to the next section for detail data transfer modes. The available
operation modes include:
• Software trigger and software polling transfer
• Internal timer pacer and interrupt transfer
• Internal timer pacer and software polling transfer
• External trigger and interrupt transfer
• External trigger and software polling transfer
Three AD clock sources (or trigger sources) are available in the ACL-
8111.
Software trigger
The trigger source is software controllable in this mode. That is, the
A/D conversion is starting when any value is written into the software
trigger register (BASE+12). Under this mode, the timing of the A/D
conversion is fully controlled by software, it is suitable for low speed
A/D conversion. However, it is difficult to control the fixed A/D
conversion rate except a timer interrupt service routine is used and the
software trigger is programmed inside the interrupt service routines.
Timer Pacer Trigger
An on-board timer / counter chip 8253 provide a pacer trigger source at
a fixed rate. Two counters of the 8253 chip are cascaded together to
generate trigger pulse with precise frequency. It's recommend to use
this mode if your applications need a fixed and precise A/D sampling
rate. It can be combined with the EOC (end-of-conversion) interrupt
data transfer.
On the ACL-8111, the 8253 chip for timer pacer trigger source is
configured as below:
The pacer rate of above configuration is determined by the formula: