Specifications

SATA-IO Confidential 57
TSG-12. In the past, a Data-to-Data Transmit Jitter (see section 7.2.2.3.11 in SATA Revision 2.6) method
was used but is no longer preferred for the use of the interoperability testing.
• TJ measured at a maximum of 0.30 UI when measured at f
BAUD
/10 (for products running at 1.5Gb/s)
Pass/Fail Criteria
2.14.8. TSG-08 : Gen1 (1.5Gb/s) DJ at Connector, Clock to Data, f
BAUD
/10 (Obsolete)
2.14.8.1. Device/Host Expected Behavior
See sections 7.2.2.3.11 and 7.3 of Serial ATA Revision 2.6.
This test is informative for all products.
• See section 7.4.8 of Serial ATA Revision 2.6.
Measurement Requirements
• For products which support 3Gb/s, this requirement would be tested at 1.5Gb/s.
• The loop damping factor for the reference PLLs is required to be 0.707.
• There are several different patterns defined within the specification and are intended to be used to verify this
requirement. In order to ensure efficient test time of products within the Interoperability Testing, testing of this
requirement will be limited to the following patterns as defined in the SATA Revision 2.6 specification: High
Frequency Test Pattern (HFTP) [TSG-08a], and Lone Bit Pattern (LBP) [TSG-08b]. It is optional to
additionally test using the Simultaneous Switching Outputs Pattern (SSOP) [TSG-08c] as a third pattern.
• For this test, the methodology of obtaining the result must follow the Clock-to-Data Transmit Jitter method
outlined in section 7.2.2.3.12 in SATA Revision 2.6, similar to that for obtaining 3Gb/s results for TSG-11 and
TSG-12. In the past, a Data-to-Data Transmit Jitter (see section 7.2.2.3.11 in SATA Revision 2.6) method
was used but is no longer preferred for the use of the interoperability testing.
• DJ measured at a maximum of 0.17 UI when measured at f
BAUD
/10 (for products running at 1.5Gb/s)
Pass/Fail Criteria
2.14.9. TSG-09 : Gen1 (1.5Gb/s) TJ at Connector, Clock to Data, f
BAUD
/500
2.14.9.1. Device/Host Expected Behavior
See sections 7.2.2.3.11 and 7.3 of Serial ATA Revision 2.6.
• See section 7.4.8 of Serial ATA Revision 2.6.
Measurement Requirements
• For products which support 3Gb/s, this requirement must be tested at 1.5Gb/s.
• The loop damping factor for the reference PLLs is required to be 0.707.
• There are several different patterns defined within the specification and are intended to be used to verify this
requirement. In order to ensure efficient test time of products within the Interoperability Testing, testing of this
requirement will be limited to the following patterns as defined in the SATA Revision 2.6 specification: High
Frequency Test Pattern (HFTP) [TSG-09a], and Lone Bit Pattern (LBP) [TSG-09b]. It is optional to
additionally test using the Simultaneous Switching Outputs Pattern (SSOP) [TSG-09c] as a third pattern.
• For this test, the methodology of obtaining the result must follow the Clock-to-Data Transmit Jitter method
outlined in section 7.2.2.3.12 in SATA Revision 2.6, similar to that for obtaining 3Gb/s results for TSG-11 and