Technical Manual
Table Of Contents
- Wireless Sensor Interface A720 (addIT™)
- 1. About the A720
- 2. Hardware
- 4. Software
- 4.1. AMOS
- 4.2. Mode Check
- 4.3. A/D Task
- 4.4. The Terminal Task
- 4.5. The Radio Interface Task
- 4.5.1. Digital Squelch
- 4.5.2. Modulation Technique Used
- 4.5.3. Generic Format of a Radio Frame
- 4.5.4. Data Frames
- 4.5.5. Frame Types
- 4.5.5.1. Request
- 4.5.5.2. Broadcast Answer
- 4.5.5.3. Set I/O Request
- 4.5.5.4. Read I/O Answer
- 4.5.5.5. Broadcast Request
- 4.5.5.6. Ping
- 4.5.5.7. Pong
- 4.5.5.8. Memory Dump Request
- 4.5.5.9. Memory Dump Answer
- 4.5.5.10. Data
- 4.5.5.11. Set ID
- 4.5.5.12. Set Slot Time and Sample Rate
- 4.5.5.13. Set Frequency
- 4.5.5.14. Set Battery Charge Levels
- 4.5.5.15. Set Pulse Counters Parameters
- 4.5.5.16. General Acknowledge
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Wireless Sensor Interface A720 (addIT™)
4.1.2. 1/2 Second Interrupt
The interrupt handler will only increment the RTC, when needed (every other inter-
rupt); no other tasks are performed on this interrupt level. The interrupt is generated
by TIMER1 of the microcontroller.
4.1.3. Pulse Counters Interrupt
Interrupts are generated by two pins on the PORTB, having the Interrupt on Change
feature. The interrupt handler must store the previous state of the port, to act only on
a certain level (user programmable, by default is zero). Additionally, a debouncing
mechanism is implemented, allowing for different types of pulses to be counted. By
default, the filter is set at 1 ms (user configurable).
Figure 23. Flow chart of the Pulse Counters Interrupt handlers.
Note: The commands to configure the level and filter values must be documented; they are not yet
implemented in the current version.
4.2. Mode Check
The system has the ability to check two input ports to switch itself in one of four op-
erating modes:
• Storage mode: in this mode, the unit is in a stand-by state, possibly stored in a
warehouse. The power supply is reduced to a minimum, by switching off al-
most all the functions of the device: the radio interface, the A/D sampling and
storage (only the battery will be monitored), and the pulse counter interrupts
will be disabled. To further reduce the power consumption, the 0.5 second in-
terrupt is switched to 2 second. However, the software accounts for this
change and the internal RTC will be correctly maintained.
Counter Interrupt
Return
Read
Port Input
Right
Level?
Yes
Arm
Debounce Timer
No
Debounce Timer
Interrupt
Read
Port Input
Return
Right
Level?
Yes
Increment
Counter
No