Datasheet

Important notes ST7LITE20F2 ST7LITE25F2 ST7LITE29F2
166/170 DocID8349 Rev 7
Concurrent interrupt context
The symptom does not occur when the interrupts are handled normally, i.e. when:
• The interrupt request is cleared (flag reset or interrupt mask) within its own interrupt
routine.
• The interrupt request is cleared (flag reset or interrupt mask) within any interrupt
routine.
• The interrupt request is cleared (flag reset or interrupt mask) in any part of the code
while this interrupt is disabled.
If these conditions are not met, the symptom can be avoided by implementing the following
sequence:
Perform SIM and RIM operation before and after resetting an active interrupt request
Ex:
SIM
reset flag or interrupt mask
RIM
16.6 Using PB4 as external interrupt
PB4 cannot be used as an external interrupt in HALT mode because the port pin PB4 is not
active in this mode.
16.7 Timebase 2 interrupt in slow mode
Timebase 2 interrupt is not available in slow mode.